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| author | Andrew Schultz <alschult@umich.edu> | 2004-02-03 16:59:40 -0500 |
|---|---|---|
| committer | Andrew Schultz <alschult@umich.edu> | 2004-02-03 16:59:40 -0500 |
| commit | d08e1bc56999d9529915f994d86d23518fa7a36b (patch) | |
| tree | addcc4825f6c9347c13db2ec9c063337ba4a91f4 /dev/tsunami_uart.cc | |
| parent | 8a28933c249bf7fcc2530a1e3059ced147a298d1 (diff) | |
| download | gem5-d08e1bc56999d9529915f994d86d23518fa7a36b.tar.xz | |
Fix to support redefinition of functional_memory base class
--HG--
extra : convert_revision : c06b2cfd2787022ee5dc664886873a9afa459434
Diffstat (limited to 'dev/tsunami_uart.cc')
| -rw-r--r-- | dev/tsunami_uart.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc index d2056e65b..30fbb70d6 100644 --- a/dev/tsunami_uart.cc +++ b/dev/tsunami_uart.cc @@ -39,7 +39,7 @@ TsunamiUart::TsunamiUart(const string &name, SimConsole *c, } Fault -TsunamiUart::read(MemReqPtr req, uint8_t *data) +TsunamiUart::read(MemReqPtr &req, uint8_t *data) { Addr daddr = req->paddr & addr_mask; DPRINTF(TsunamiUart, " read register %#x\n", daddr); @@ -116,7 +116,7 @@ TsunamiUart::read(MemReqPtr req, uint8_t *data) } Fault -TsunamiUart::write(MemReqPtr req, const uint8_t *data) +TsunamiUart::write(MemReqPtr &req, const uint8_t *data) { Addr daddr = req->paddr & addr_mask; |