Fixes for detailed boot, made cttz and ctlz instructions more compact,

and started cleaning up config files.

arch/alpha/isa_desc:
    Made implementation of cttz and ctlz more compact
base/remote_gdb.cc:
    Added comment about PALcode debugger accesses
dev/baddev.cc:
dev/baddev.hh:
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
    Cleaned up includes and changed device from FunctionalMemory to
    PioDevice for detailed boot
dev/ns_gige.cc:
    The ethernet dev uses two BARs, and the first bars size was being set
    incorrectly.
dev/tsunamireg.h:
    I don't know why we were using the superpage as the PCI memory addr.
    Changed and works correctly with detailed boot.

--HG--
extra : convert_revision : b535e76612cb90b544305dc1aa8c5e0e774564bd

1 files changed, 1 insertions, 1 deletions

diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc
index 28c97c4cd..84eb80c8a 100644
--- a/dev/tsunami_uart.cc
+++ b/dev/tsunami_uart.cc
@@ -82,7 +82,7 @@ TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
     if (bus) {
         pioInterface = newPioInterface(name, hier, bus, this,
                                       &TsunamiUart::cacheAccess);
-         pioInterface->addAddrRange(addr, addr + size - 1);
+        pioInterface->addAddrRange(addr, addr + size - 1);
     }
 
     IER = 0;