diff options
author | Andrew Schultz <alschult@umich.edu> | 2004-02-10 00:19:43 -0500 |
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committer | Andrew Schultz <alschult@umich.edu> | 2004-02-10 00:19:43 -0500 |
commit | 81d5ffe7dea641402a5e1b92448646f515f46677 (patch) | |
tree | 9334b2fac9632e8bf6a5879ead536f6bf3f99f17 /dev/tsunami_uart.cc | |
parent | eac2d6a66863dcd7d5129ee5112ea49248f9efa8 (diff) | |
download | gem5-81d5ffe7dea641402a5e1b92448646f515f46677.tar.xz |
Changed new linux stuff to work with new FunctionalMemory interface and
some sundry problems with new interface
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/baddev.cc:
dev/baddev.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/tsunami_uart.cc:
dev/tsunami_uart.hh:
Fixed to use new FunctionalMemory interface
--HG--
extra : convert_revision : bee98e6285d92f28fafacf919ab06eaf333a9b56
Diffstat (limited to 'dev/tsunami_uart.cc')
-rw-r--r-- | dev/tsunami_uart.cc | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/dev/tsunami_uart.cc b/dev/tsunami_uart.cc index 0a0b5ffef..ab9236081 100644 --- a/dev/tsunami_uart.cc +++ b/dev/tsunami_uart.cc @@ -31,10 +31,10 @@ using namespace std; #define CONS_INT_TX 0x01 // interrupt enable / state bits #define CONS_INT_RX 0x02 -TsunamiUart::TsunamiUart(const string &name, SimConsole *c, - Addr addr, Addr mask, MemoryController *mmu) - : MmapDevice(name, addr, mask, mmu), - cons(c), status_store(0), valid_char(false) +TsunamiUart::TsunamiUart(const string &name, SimConsole *c, Addr a, + MemoryController *mmu) + : FunctionalMemory(name), addr(a), cons(c), status_store(0), + valid_char(false) { IER = 0; } @@ -42,7 +42,7 @@ TsunamiUart::TsunamiUart(const string &name, SimConsole *c, Fault TsunamiUart::read(MemReqPtr &req, uint8_t *data) { - Addr daddr = req->paddr & addr_mask; + Addr daddr = req->paddr & size; DPRINTF(TsunamiUart, " read register %#x\n", daddr); switch (req->size) { @@ -130,7 +130,7 @@ TsunamiUart::read(MemReqPtr &req, uint8_t *data) Fault TsunamiUart::write(MemReqPtr &req, const uint8_t *data) { - Addr daddr = req->paddr & addr_mask; + Addr daddr = req->paddr & size; DPRINTF(TsunamiUart, " write register %#x value %#x\n", daddr, *(uint8_t*)data); switch (daddr) { @@ -198,7 +198,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart) SimObjectParam<SimConsole *> console; SimObjectParam<MemoryController *> mmu; Param<Addr> addr; - Param<Addr> mask; END_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart) @@ -206,14 +205,13 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiUart) INIT_PARAM(console, "The console"), INIT_PARAM(mmu, "Memory Controller"), - INIT_PARAM(addr, "Device Address"), - INIT_PARAM(mask, "Address Mask") + INIT_PARAM(addr, "Device Address") END_INIT_SIM_OBJECT_PARAMS(TsunamiUart) CREATE_SIM_OBJECT(TsunamiUart) { - return new TsunamiUart(getInstanceName(), console, addr, mask, mmu); + return new TsunamiUart(getInstanceName(), console, addr, mmu); } REGISTER_SIM_OBJECT("TsunamiUart", TsunamiUart) |