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| author | Ali Saidi <saidi@eecs.umich.edu> | 2004-01-21 20:14:10 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2004-01-21 20:14:10 -0500 |
| commit | 0e805e1ff35a5c70f8aff785db709c1f3b8d0c28 (patch) | |
| tree | 477c44468c2133786843d587e5b16a583bd49897 /dev/tsunamireg.h | |
| parent | cb51c1503c6b860e1f848e227d07a773f94f23b6 (diff) | |
| download | gem5-0e805e1ff35a5c70f8aff785db709c1f3b8d0c28.tar.xz | |
one step closer to booting
dev/alpha_access.h:
removed my attempted hack to get console compling in linux
dev/tsunami.cc:
dev/tsunami.hh:
added pchip pointer to tsunami
dev/tsunami_cchip.cc:
made printing better
dev/tsunami_cchip.hh:
commented out back pointer for now, since the parser has issues with it
dev/tsunamireg.h:
added pchip registers
--HG--
extra : convert_revision : b4fceb7d08e757d9aaf37df8eb1bcd5ae29ce0da
Diffstat (limited to 'dev/tsunamireg.h')
| -rw-r--r-- | dev/tsunamireg.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/dev/tsunamireg.h b/dev/tsunamireg.h index fe92846c2..12275fee2 100644 --- a/dev/tsunamireg.h +++ b/dev/tsunamireg.h @@ -2,6 +2,7 @@ #ifndef __TSUNAMIREG_H__ #define __TSUNAMIREG_H__ +// CChip Registers #define TSDEV_CC_CSR 0x00 #define TSDEV_CC_MTR 0x01 #define TSDEV_CC_MISC 0x02 @@ -30,4 +31,38 @@ #define TSDEV_CC_IIC2 0x1C #define TSDEV_CC_IIC3 0x1D + +// PChip Registers +#define TSDEV_PC_WSBA0 0x00 +#define TSDEV_PC_WSBA1 0x01 +#define TSDEV_PC_WSBA2 0x02 +#define TSDEV_PC_WSBA3 0x03 +#define TSDEV_PC_WSM0 0x04 +#define TSDEV_PC_WSM1 0x05 +#define TSDEV_PC_WSM2 0x06 +#define TSDEV_PC_WSM3 0x07 +#define TSDEV_PC_TBA0 0x08 +#define TSDEV_PC_TBA1 0x09 +#define TSDEV_PC_TBA2 0x0A +#define TSDEV_PC_TBA3 0x0B +#define TSDEV_PC_PCTL 0x0C +#define TSDEV_PC_PLAT 0x0D +#define TSDEV_PC_RES 0x0E +#define TSDEV_PC_PERROR 0x0F +#define TSDEV_PC_PERRMASK 0x10 +#define TSDEV_PC_PERRSET 0x11 +#define TSDEV_PC_TLBIV 0x12 +#define TSDEV_PC_TLBIA 0x13 +#define TSDEV_PC_PMONCTL 0x14 +#define TSDEV_PC_PMONCNT 0x15 + +#define TSDEV_PC_SPST 0x20 + + +// DChip Registers +#define TSDEV_DC_DSC 0x20 +#define TSDEV_DC_STR 0x21 +#define TSDEV_DC_DREV 0x22 +#define TSDEV_DC_DSC2 0x23 + #endif // __TSUNAMIREG_H__ |