diff options
author | Nathan Binkert <binkertn@umich.edu> | 2004-07-12 22:58:22 -0400 |
---|---|---|
committer | Nathan Binkert <binkertn@umich.edu> | 2004-07-12 22:58:22 -0400 |
commit | 13f8dc981fc898e6e200689d305b39f0718f8c83 (patch) | |
tree | e75ced9115aef60e6c173e08633e19ba92b62569 /dev/uart.cc | |
parent | c2e5caf3606b85b6f45cde53b8021692ef01710e (diff) | |
download | gem5-13f8dc981fc898e6e200689d305b39f0718f8c83.tar.xz |
make the cache access latency a parameter that is based on bus
ticks for the most commonly accessed devices.
dev/baddev.cc:
Get rid of the constant cache access latency.
For unimportant devices, don't add any latency.
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/tsunami_cchip.cc:
dev/tsunami_cchip.hh:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart.cc:
dev/uart.hh:
make the cache access latency a parameter that is based on bus
ticks.
dev/io_device.cc:
dev/io_device.hh:
add an io latency variable
dev/ns_gige.hh:
this moved to io_device.hh
--HG--
extra : convert_revision : 4883130feeaef48abee492eddf0b8eb40eb94789
Diffstat (limited to 'dev/uart.cc')
-rw-r--r-- | dev/uart.cc | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/dev/uart.cc b/dev/uart.cc index 4784ad640..8ba59579d 100644 --- a/dev/uart.cc +++ b/dev/uart.cc @@ -88,7 +88,7 @@ Uart::IntrEvent::scheduleIntr() } Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a, - Addr s, HierParams *hier, Bus *bus, Platform *p) + Addr s, HierParams *hier, Bus *bus, Tick pio_latency, Platform *p) : PioDevice(name), addr(a), size(s), cons(c), txIntrEvent(this, TX_INT), rxIntrEvent(this, RX_INT), platform(p) { @@ -98,7 +98,8 @@ Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a, if (bus) { pioInterface = newPioInterface(name, hier, bus, this, &Uart::cacheAccess); - pioInterface->addAddrRange(addr, addr + size - 1); + pioInterface->addAddrRange(addr, addr + size - 1); + pioLatency = pio_latency * bus->clockRatio; } readAddr = 0; @@ -370,7 +371,7 @@ Uart::dataAvailable() Tick Uart::cacheAccess(MemReqPtr &req) { - return curTick + 1000; + return curTick + pioLatency; } void @@ -432,6 +433,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Uart) Param<Addr> addr; Param<Addr> size; SimObjectParam<Bus*> io_bus; + Param<Tick> pio_latency; SimObjectParam<HierParams *> hier; @@ -445,6 +447,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Uart) INIT_PARAM(addr, "Device Address"), INIT_PARAM_DFLT(size, "Device size", 0x8), INIT_PARAM_DFLT(io_bus, "The IO Bus to attach to", NULL), + INIT_PARAM_DFLT(pio_latency, "Programmed IO latency in bus cycles", 1), INIT_PARAM_DFLT(hier, "Hierarchy global variables", &defaultHierParams) END_INIT_SIM_OBJECT_PARAMS(Uart) @@ -452,7 +455,7 @@ END_INIT_SIM_OBJECT_PARAMS(Uart) CREATE_SIM_OBJECT(Uart) { return new Uart(getInstanceName(), console, mmu, addr, size, hier, io_bus, - platform); + pio_latency, platform); } REGISTER_SIM_OBJECT("Uart", Uart) |