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authorNathan Binkert <binkertn@umich.edu>2005-11-20 16:57:53 -0500
committerNathan Binkert <binkertn@umich.edu>2005-11-20 16:57:53 -0500
commit12d903a650a91798eae2389e70f7d4471d130919 (patch)
tree625b9e1a80405e63298e00aa12855231f502ab06 /dev/uart8250.hh
parentccae5838fd4ec3b6aa27024beb24e231f6d3c63a (diff)
downloadgem5-12d903a650a91798eae2389e70f7d4471d130919.tar.xz
io_bus is split out into pio_bus and dma_bus so that any device
can specify either independently. python/m5/objects/Device.py: io_bus is split out into pio_bus and dma_bus so that any device can specify either independently. dma_bus defaults to point to whatever pio_bus uses. --HG-- extra : convert_revision : d35d5374d0bf592f6b5df465c05203577b8b8763
Diffstat (limited to 'dev/uart8250.hh')
-rw-r--r--dev/uart8250.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/dev/uart8250.hh b/dev/uart8250.hh
index b4c660021..88abf8e24 100644
--- a/dev/uart8250.hh
+++ b/dev/uart8250.hh
@@ -79,7 +79,7 @@ class Uart8250 : public Uart
public:
Uart8250(const std::string &name, SimConsole *c, MemoryController *mmu,
- Addr a, Addr s, HierParams *hier, Bus *bus, Tick pio_latency,
+ Addr a, Addr s, HierParams *hier, Bus *pio_bus, Tick pio_latency,
Platform *p);
virtual Fault read(MemReqPtr &req, uint8_t *data);