Hand merge

base/traceflags.py:
    Include new flags

--HG--
extra : convert_revision : 8017cbe256860dce8b1efc1b4e1e81e883895b90

9 files changed, 46 insertions, 31 deletions

diff --git a/dev/etherdump.cc b/dev/etherdump.cc
index 3de417bdc..39b94f923 100644
--- a/dev/etherdump.cc
+++ b/dev/etherdump.cc
@@ -74,9 +74,6 @@ void
 EtherDump::init()
 {
     curtime = time(NULL);
-    s_freq = ticksPerSecond;
-    us_freq = ticksPerSecond / ULL(1000000);
-
     struct pcap_file_header hdr;
     hdr.magic = TCPDUMP_MAGIC;
     hdr.version_major = PCAP_VERSION_MAJOR;
@@ -108,8 +105,8 @@ void
 EtherDump::dumpPacket(PacketPtr &packet)
 {
     pcap_pkthdr pkthdr;
-    pkthdr.seconds = curtime + (curTick / s_freq);
-    pkthdr.microseconds = (curTick / us_freq) % ULL(1000000);
+    pkthdr.seconds = curtime + (curTick / Clock::Int::s);
+    pkthdr.microseconds = (curTick / Clock::Int::us) % ULL(1000000);
     pkthdr.caplen = std::min(packet->length, maxlen);
     pkthdr.len = packet->length;
     stream.write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
diff --git a/dev/etherdump.hh b/dev/etherdump.hh
index ba15796c8..1296ebb10 100644
--- a/dev/etherdump.hh
+++ b/dev/etherdump.hh
@@ -49,8 +49,6 @@ class EtherDump : public SimObject
     void init();
 
     Tick curtime;
-    Tick s_freq;
-    Tick us_freq;
 
   public:
     EtherDump(const std::string &name, const std::string &file, int max);
diff --git a/dev/etherlink.cc b/dev/etherlink.cc
index 81cdbc20f..ba0fa705c 100644
--- a/dev/etherlink.cc
+++ b/dev/etherlink.cc
@@ -52,7 +52,7 @@ EtherLink::EtherLink(const string &name, EtherInt *peer0, EtherInt *peer1,
     : SimObject(name)
 {
     double rate = ((double)ticksPerSecond * 8.0) / (double)speed;
-    Tick delay = US2Ticks(dly);
+    Tick delay = dly * Clock::Int::us;
 
     link[0] = new Link(name + ".link0", this, 0, rate, delay, dump);
     link[1] = new Link(name + ".link1", this, 1, rate, delay, dump);
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index 037de1dea..857cdeb78 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -289,15 +289,16 @@ IdeController::ReadConfig(int offset, int size, uint8_t *data)
         memcpy((void *)data, (void *)&pci_regs[offset], size);
     }
 
-    DPRINTF(IdeCtrl, "IDE PCI read offset: %#x (%#x) size: %#x data: %#x\n",
-                origOffset, offset, size, *(uint32_t *)data);
+    DPRINTF(IdeCtrl, "PCI read offset: %#x (%#x) size: %#x data: %#x\n",
+            origOffset, offset, size,
+            (*(uint32_t *)data) & (0xffffffff >> 8 * (4 - size)));
 }
 
 void
 IdeController::WriteConfig(int offset, int size, uint32_t data)
 {
-    DPRINTF(IdeCtrl, "IDE PCI write offset: %#x size: %#x data: %#x\n",
-            offset, size, data);
+    DPRINTF(IdeCtrl, "PCI write offset: %#x size: %#x data: %#x\n",
+            offset, size, data & (0xffffffff >> 8 * (4 - size)));
 
     // do standard write stuff if in standard PCI space
     if (offset < PCI_DEVICE_SPECIFIC) {
@@ -438,8 +439,9 @@ IdeController::read(MemReqPtr &req, uint8_t *data)
         memcpy((void *)data, &bmi_regs[offset], req->size);
     }
 
-    DPRINTF(IdeCtrl, "IDE read from offset: %#x size: %#x data: %#x\n",
-            offset, req->size, *(uint32_t *)data);
+    DPRINTF(IdeCtrl, "read from offset: %#x size: %#x data: %#x\n",
+            offset, req->size,
+            (*(uint32_t *)data) & (0xffffffff >> 8 * (4 - req->size)));
 
     return No_Fault;
 }
@@ -458,8 +460,9 @@ IdeController::write(MemReqPtr &req, const uint8_t *data)
     byte = (req->size == sizeof(uint8_t)) ? true : false;
     cmdBlk = (type == COMMAND_BLOCK) ? true : false;
 
-    DPRINTF(IdeCtrl, "IDE write from offset: %#x size: %#x data: %#x\n",
-            offset, req->size, *(uint32_t *)data);
+    DPRINTF(IdeCtrl, "write from offset: %#x size: %#x data: %#x\n",
+            offset, req->size,
+            (*(uint32_t *)data) & (0xffffffff >> 8 * (4 - req->size)));
 
     uint8_t oldVal, newVal;
 
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index bfaf3d3aa..213fc6a97 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -336,7 +336,8 @@ IdeDisk::dmaPrdReadDone()
            physmem->dma_addr(curPrdAddr, sizeof(PrdEntry_t)),
            sizeof(PrdEntry_t));
 
-    DPRINTF(IdeDisk, "PRD: baseAddr:%#x (%#x) byteCount:%d (%d) eot:%#x sector:%d\n",
+    DPRINTF(IdeDisk,
+            "PRD: baseAddr:%#x (%#x) byteCount:%d (%d) eot:%#x sector:%d\n",
             curPrd.getBaseAddr(), pciToDma(curPrd.getBaseAddr()),
             curPrd.getByteCount(), (cmdBytesLeft/SectorSize),
             curPrd.getEOT(), curSector);
@@ -609,10 +610,10 @@ void
 IdeDisk::abortDma()
 {
     if (dmaState == Dma_Idle)
-        panic("Inconsistent DMA state, should be in Dma_Start or Dma_Transfer!\n");
+        panic("Inconsistent DMA state, should be Start or Transfer!");
 
     if (devState != Transfer_Data_Dma && devState != Prepare_Data_Dma)
-        panic("Inconsistent device state, should be in Transfer or Prepare!\n");
+        panic("Inconsistent device state, should be Transfer or Prepare!\n");
 
     updateState(ACT_CMD_ERROR);
 }
@@ -732,7 +733,7 @@ IdeDisk::startCommand()
 void
 IdeDisk::intrPost()
 {
-    DPRINTF(IdeDisk, "IDE Disk Posting Interrupt\n");
+    DPRINTF(IdeDisk, "Posting Interrupt\n");
     if (intrPending)
         panic("Attempt to post an interrupt with one pending\n");
 
@@ -746,7 +747,7 @@ IdeDisk::intrPost()
 void
 IdeDisk::intrClear()
 {
-    DPRINTF(IdeDisk, "IDE Disk Clearing Interrupt\n");
+    DPRINTF(IdeDisk, "Clearing Interrupt\n");
     if (!intrPending)
         panic("Attempt to clear a non-pending interrupt\n");
 
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index 53a881ef7..bc3103540 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -138,7 +138,7 @@ NSGigE::NSGigE(Params *p)
     }
 
 
-    intrDelay = US2Ticks(p->intr_delay);
+    intrDelay = p->intr_delay * Clock::Int::us;
     dmaReadDelay = p->dma_read_delay;
     dmaWriteDelay = p->dma_write_delay;
     dmaReadFactor = p->dma_read_factor;
diff --git a/dev/sinic.cc b/dev/sinic.cc
index fa4cd570f..13e16afae 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -79,7 +79,7 @@ const char *TxStateStrings[] =
 //
 Base::Base(Params *p)
     : PciDev(p), rxEnable(false), txEnable(false),
-      intrDelay(US2Ticks(p->intr_delay)),
+      intrDelay(p->intr_delay * Clock::Int::us),
       intrTick(0), cpuIntrEnable(false), cpuPendingIntr(false), intrEvent(0),
       interface(NULL)
 {
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 6c9195bff..1e4f44346 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -95,6 +95,13 @@ TsunamiIO::RTCEvent::unserialize(Checkpoint *cp, const std::string &section)
 TsunamiIO::ClockEvent::ClockEvent()
     : Event(&mainEventQueue)
 {
+    /* This is the PIT Tick Rate. A constant for the 8254 timer. The
+     * Tsunami platform has one of these cycle counters on the Cypress
+     * South Bridge and it is used by linux for estimating the cycle
+     * frequency of the machine it is running on. --Ali
+     */
+    interval = (Tick)(Clock::Float::s / 1193180.0);
+
     DPRINTF(Tsunami, "Clock Event Initilizing\n");
     mode = 0;
 }
@@ -113,9 +120,7 @@ void
 TsunamiIO::ClockEvent::Program(int count)
 {
     DPRINTF(Tsunami, "Timer set to curTick + %d\n", count);
-    // should be count * (cpufreq/pitfreq)
-    interval = count * ticksPerSecond/1193180UL;
-    schedule(curTick + interval);
+    schedule(curTick + count * interval);
     status = 0;
 }
 
diff --git a/dev/uart.cc b/dev/uart.cc
index 3c4ab6d04..caa169a2e 100644
--- a/dev/uart.cc
+++ b/dev/uart.cc
@@ -73,17 +73,28 @@ Uart::IntrEvent::process()
 
 }
 
+/* The linux serial driver (8250.c about line 1182) loops reading from
+ * the device until the device reports it has no more data to
+ * read. After a maximum of 255 iterations the code prints "serial8250
+ * too much work for irq X," and breaks out of the loop. Since the
+ * simulated system is so much slower than the actual system, if a
+ * user is typing on the keyboard it is very easy for them to provide
+ * input at a fast enough rate to not allow the loop to exit and thus
+ * the error to be printed. This magic number provides a delay between
+ * the time the UART receives a character to send to the simulated
+ * system and the time it actually notifies the system it has a
+ * character to send to alleviate this problem. --Ali
+ */
 void
 Uart::IntrEvent::scheduleIntr()
 {
+    static const Tick interval = (Tick)((Clock::Float::s / 2e9) * 450);
     DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit,
-            curTick + (ticksPerSecond/2000) * 350);
+            curTick + interval);
     if (!scheduled())
-        /* @todo Make this cleaner, will be much easier with
-         *       nanosecond time everywhere. Hint hint  Nate. */
-        schedule(curTick + (ticksPerSecond/2000000000) * 450);
+        schedule(curTick + interval);
     else
-        reschedule(curTick + (ticksPerSecond/2000000000) * 450);
+        reschedule(curTick + interval);
 }
 
 Uart::Uart(const string &name, SimConsole *c, MemoryController *mmu, Addr a,