Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.

arch/alpha/alpha_linux_process.cc:
    Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
    Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
    Added using directive for AlphaISA
arch/alpha/ev5.hh:
    Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
    Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
    Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
    Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
    Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
    Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
    Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
    Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
    Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
    Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
    Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
    Added a typedef for Addr
base/loader/symtab.hh:
    Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
    Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
    Added typedefs for Addr and MachInst
cpu/base.cc:
    Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
    Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
    Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
    Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
    Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
    Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
    Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
    Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
    Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
    Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
    Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
    untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
    Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
    Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
    Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
    Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
    Cleaned up namespace issues
cpu/o3/cpu.hh:
    Cleaned up namespace usage
cpu/o3/decode.hh:
    Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
    Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
    Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
    Removed typedef of ISA
cpu/o3/iew_impl.hh:
    Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
    Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
    Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
    Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
    Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
    Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
    Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
    Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
    Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
    Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
    Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
    Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
    Untemplatized StaticInst
cpu/static_inst.hh:
    Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
    Added using namespace AlphaISA
dev/simple_disk.hh:
    Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
    Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
    Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
    Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
    Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
    Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
    Added TheISA to Addr type in structs
sim/process.hh:
    Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
    Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
    Added typecast for Addr, and TheISA namespace specifier for where needed

--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45

20 files changed, 40 insertions, 12 deletions

diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 38fbbdef0..a7ef8f641 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -53,6 +53,7 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace AlphaISA;
 
 AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d,
                            System *s, BaseCPU *c, Platform *p,
diff --git a/dev/baddev.cc b/dev/baddev.cc
index b6ca919e4..62871e348 100644
--- a/dev/baddev.cc
+++ b/dev/baddev.cc
@@ -46,6 +46,7 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace TheISA;
 
 BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
                      HierParams *hier, Bus *pio_bus, const string &devicename)
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index a5cb0dfd8..18c988b81 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -48,6 +48,7 @@
 #include "sim/sim_object.hh"
 
 using namespace std;
+using namespace TheISA;
 
 ////
 // Initialization and destruction
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index 9d8bb8825..41400c590 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -53,6 +53,7 @@
 #include "arch/isa_traits.hh"
 
 using namespace std;
+using namespace TheISA;
 
 IdeDisk::IdeDisk(const string &name, DiskImage *img, PhysicalMemory *phys,
                  int id, Tick delay)
diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh
index a656ca464..32888c81c 100644
--- a/dev/ide_disk.hh
+++ b/dev/ide_disk.hh
@@ -188,6 +188,8 @@ class IdeController;
 class IdeDisk : public SimObject
 {
   protected:
+    typedef TheISA::Addr Addr;
+  protected:
     /** The IDE controller for this disk. */
     IdeController *ctrl;
     /** The DMA interface to use for transfers */
diff --git a/dev/isa_fake.cc b/dev/isa_fake.cc
index 93c9eedbf..117c9e5ad 100644
--- a/dev/isa_fake.cc
+++ b/dev/isa_fake.cc
@@ -45,6 +45,7 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace TheISA;
 
 IsaFake::IsaFake(const string &name, Addr a, MemoryController *mmu,
                          HierParams *hier, Bus *pio_bus, Addr size)
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index c28615438..07bf178fc 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -84,6 +84,7 @@ const char *NsDmaState[] =
 
 using namespace std;
 using namespace Net;
+using namespace TheISA;
 
 ///////////////////////////////////////////////////////////////////////
 //
diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index 1175172c4..c581e1561 100644
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -47,6 +47,7 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace TheISA;
 
 PciConfigAll::PciConfigAll(const string &name,
                            Addr a, MemoryController *mmu,
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index c8d9685c1..a100bf746 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -53,6 +53,8 @@ class MemoryController;
  */
 class PciConfigData : public SimObject
 {
+  protected:
+    typedef TheISA::Addr Addr;
   public:
     /**
      * Constructor to initialize the devices config space to 0.
diff --git a/dev/platform.cc b/dev/platform.cc
index 58f94db7b..5b667b12c 100644
--- a/dev/platform.cc
+++ b/dev/platform.cc
@@ -31,6 +31,7 @@
 #include "sim/sim_exit.hh"
 
 using namespace std;
+using namespace TheISA;
 
 Platform::Platform(const string &name, IntrControl *intctrl, PciConfigAll *pci)
     : SimObject(name), intrctrl(intctrl), pciconfig(pci)
diff --git a/dev/platform.hh b/dev/platform.hh
index 1ee645454..87810250a 100644
--- a/dev/platform.hh
+++ b/dev/platform.hh
@@ -44,6 +44,8 @@ class Uart;
 
 class Platform : public SimObject
 {
+  protected:
+    typedef TheISA::Addr Addr;
   public:
     /** Pointer to the interrupt controller */
     IntrControl *intrctrl;
diff --git a/dev/simple_disk.hh b/dev/simple_disk.hh
index 6560e15c2..f68d5bfff 100644
--- a/dev/simple_disk.hh
+++ b/dev/simple_disk.hh
@@ -44,19 +44,21 @@ class PhysicalMemory;
  */
 class SimpleDisk : public SimObject
 {
-public:
-  typedef uint64_t baddr_t;
+  protected:
+    typedef TheISA::Addr Addr;
+  public:
+    typedef uint64_t baddr_t;
 
-protected:
-  PhysicalMemory  *physmem;
-  DiskImage *image;
+  protected:
+    PhysicalMemory  *physmem;
+    DiskImage *image;
 
-public:
-  SimpleDisk(const std::string &name, PhysicalMemory *pmem, DiskImage *img);
-  ~SimpleDisk();
+  public:
+    SimpleDisk(const std::string &name, PhysicalMemory *pmem, DiskImage *img);
+    ~SimpleDisk();
 
-  void read(Addr addr, baddr_t block, int count) const;
-  void write(Addr addr, baddr_t block, int count);
+    void read(Addr addr, baddr_t block, int count) const;
+    void write(Addr addr, baddr_t block, int count);
 };
 
 #endif // __DEV_SIMPLE_DISK_HH__
diff --git a/dev/sinic.cc b/dev/sinic.cc
index e79f80678..829d58d32 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -50,6 +50,7 @@
 #include "targetarch/vtophys.hh"
 
 using namespace Net;
+using namespace TheISA;
 
 namespace Sinic {
 
diff --git a/dev/sinicreg.hh b/dev/sinicreg.hh
index b7008b4e1..343db6303 100644
--- a/dev/sinicreg.hh
+++ b/dev/sinicreg.hh
@@ -165,7 +165,7 @@ struct Info
 /* namespace Regs */ }
 
 inline const Regs::Info&
-regInfo(Addr daddr)
+regInfo(TheISA::Addr daddr)
 {
     static Regs::Info invalid = { 0, false, false, false, false, "invalid" };
     static Regs::Info info [] = {
@@ -201,7 +201,7 @@ regInfo(Addr daddr)
 }
 
 inline bool
-regValid(Addr daddr)
+regValid(TheISA::Addr daddr)
 {
     if (daddr > Regs::Size)
         return false;
diff --git a/dev/tsunami.cc b/dev/tsunami.cc
index 760848a00..58fc7434e 100644
--- a/dev/tsunami.cc
+++ b/dev/tsunami.cc
@@ -46,6 +46,8 @@
 #include "sim/system.hh"
 
 using namespace std;
+//Should this be AlphaISA?
+using namespace TheISA;
 
 Tsunami::Tsunami(const string &name, System *s, IntrControl *ic,
                  PciConfigAll *pci)
diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index 7fd91d5b2..79b561ed7 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -55,6 +55,8 @@ class System;
 
 class Tsunami : public Platform
 {
+  protected:
+    typedef TheISA::Addr Addr;
   public:
     /** Max number of CPUs in a Tsunami */
     static const int Max_CPUs = 64;
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index 4cda9ec36..10c08a7a2 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -47,6 +47,8 @@
 #include "sim/system.hh"
 
 using namespace std;
+//Should this be AlphaISA?
+using namespace TheISA;
 
 TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
                            MemoryController *mmu, HierParams *hier,
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index 0d0d27570..e90bb5abc 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -50,6 +50,8 @@
 #include "mem/functional/memory_control.hh"
 
 using namespace std;
+//Should this be AlphaISA?
+using namespace TheISA;
 
 TsunamiIO::RTC::RTC(const string &name, Tsunami* t, Tick i)
     : _name(name), event(t, i), addr(0)
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index a4c04a79f..706daf9dc 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -47,6 +47,8 @@
 #include "sim/system.hh"
 
 using namespace std;
+//Should this be AlphaISA?
+using namespace TheISA;
 
 TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
                            MemoryController *mmu, HierParams *hier,
diff --git a/dev/uart8250.cc b/dev/uart8250.cc
index a2e782189..99355e28a 100644
--- a/dev/uart8250.cc
+++ b/dev/uart8250.cc
@@ -46,6 +46,7 @@
 #include "sim/builder.hh"
 
 using namespace std;
+using namespace TheISA;
 
 Uart8250::IntrEvent::IntrEvent(Uart8250 *u, int bit)
     : Event(&mainEventQueue), uart(u)