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authorLisa Hsu <hsul@eecs.umich.edu>2004-07-09 11:50:27 -0400
committerLisa Hsu <hsul@eecs.umich.edu>2004-07-09 11:50:27 -0400
commit7b2691d53725318810f78c712dbbe4733c319ef8 (patch)
treed743dad92fa8fc74a06c6d2b50ce35ba824ff0e7 /dev
parent9dba9e462f6abc1e7ca15258b176ae50cd111d1c (diff)
downloadgem5-7b2691d53725318810f78c712dbbe4733c319ef8.tar.xz
when you add caches, dma commands within the state machine are delayed and cause the state machine to exit until the dma comes back. thus, all relevant code must be executed BEFORE going to do the dma code.
dev/ns_gige.cc: rearrange code so nothing gets skipped when "doing dma." --HG-- extra : convert_revision : cca66885f45e7df1831e2d8ccaddf5ece7600b13
Diffstat (limited to 'dev')
-rw-r--r--dev/ns_gige.cc7
1 files changed, 3 insertions, 4 deletions
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index f88fc507f..68a50bcce 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -1889,11 +1889,7 @@ NSGigE::txKick()
descDmaWrites++;
descDmaWrBytes += txDmaLen;
- if (doTxDmaWrite())
- goto exit;
-
transmit();
-
txPacket = 0;
if (txHalt) {
@@ -1902,6 +1898,9 @@ NSGigE::txKick()
txHalt = false;
} else
txState = txAdvance;
+
+ if (doTxDmaWrite())
+ goto exit;
}
} else {
DPRINTF(EthernetSM, "this descriptor isn't done yet\n");