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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2003-10-23 19:07:52 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2003-10-23 19:07:52 -0700 |
| commit | f5da73b6881991a28844ed59e8dcc1d154ddae7e (patch) | |
| tree | bc89728af5db24ef0bf1580045c3bcd26a206e85 /dev | |
| parent | 73b050a541b1778596f9ebffa8a9f780446365c3 (diff) | |
| download | gem5-f5da73b6881991a28844ed59e8dcc1d154ddae7e.tar.xz | |
Initial support for CPU switching. New SamplingCPU object encompasses a set
of CPUs that get switched round-robin (though currently we're only shooting for
two CPUs and one switch event, and even that doesn't quite work yet). Registration
of ExecContexts with System/Process object factored out so we can create two CPUs
but only register one of them at a time. Also worked at making behavior and naming
in System and Process objects more consistent.
arch/alpha/ev5.cc:
Rename ipr_init to initIPRs and get rid of unused mem arg.
arch/alpha/fake_syscall.cc:
Process:numCpus is now a function (not a data member).
base/remote_gdb.hh:
Support for ExecContext switching.
cpu/base_cpu.cc:
cpu/base_cpu.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
cpu/simple_cpu/simple_cpu.cc:
Support for ExecContext switching.
Renamed contexts array to execContexts to be consistent with Process.
CPU ID now auto-assigned by system object.
Cleaned up MP full-system initialization a bit.
dev/alpha_console.cc:
Renamed xcvec array to execContexts to be consistent with Process.
kern/tru64/tru64_system.cc:
kern/tru64/tru64_system.hh:
Support for ExecContext switching.
CPU ID now auto-assigned by system object.
sim/prog.cc:
sim/prog.hh:
Support for ExecContext switching.
Process:numCpus is now a function (not a data member).
sim/system.cc:
sim/system.hh:
Support for ExecContext switching.
Renamed xcvec array to execContexts to be consistent with Process.
--HG--
extra : convert_revision : 79649cffad5bf3e83de8df44236941907926d791
Diffstat (limited to 'dev')
| -rw-r--r-- | dev/alpha_console.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index b917d7a96..cd03b3656 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -153,7 +153,7 @@ AlphaConsole::write(MemReqPtr req, const uint8_t *data) int cpu = val; assert(cpu > 0 && "Must not access primary cpu"); - ExecContext *other_xc = req->xc->system->xcvec[cpu]; + ExecContext *other_xc = req->xc->system->execContexts[cpu]; other_xc->regs.intRegFile[16] = cpu; other_xc->regs.ipr[TheISA::IPR_PALtemp16] = cpu; other_xc->regs.intRegFile[0] = cpu; |