diff options
author | Andrew Schultz <alschult@umich.edu> | 2004-05-06 15:21:07 -0400 |
---|---|---|
committer | Andrew Schultz <alschult@umich.edu> | 2004-05-06 15:21:07 -0400 |
commit | 4a5dcc37bfb26c152c195061fa70c7aa246b5ca6 (patch) | |
tree | 7c74980b640a7ffdca5bf601a0363c62b6b38257 /dev | |
parent | 8538ffdb3682d71c90c33b92b436a2d9cbdc42c3 (diff) | |
download | gem5-4a5dcc37bfb26c152c195061fa70c7aa246b5ca6.tar.xz |
Whole mess'o'changes.. see individual files
arch/alpha/vtophys.cc:
Removed buggy code that tries to fix PAL addresses (may cause problems
while trying to debug in PAL code, but that should do this fix outside
of vtophys)
base/loader/symtab.cc:
base/loader/symtab.hh:
cpu/exetrace.cc:
Changed InstExec traces to always print a symbol name
dev/ide_ctrl.cc:
dev/ide_disk.cc:
Tabs
dev/ide_disk.hh:
Change buffer size
dev/tsunami_pchip.cc:
Fix translatePciToDma to support scatter gather mapping
kern/linux/linux_system.cc:
Force simulator to wait until remote debugger attaches (should be removed
or turned on/off with a flag)
--HG--
extra : convert_revision : 1d08aebe3f448c87a963dd613de3e2e0cff0d48d
Diffstat (limited to 'dev')
-rw-r--r-- | dev/ide_disk.cc | 21 | ||||
-rw-r--r-- | dev/ide_disk.hh | 4 | ||||
-rw-r--r-- | dev/tsunami_pchip.cc | 47 |
3 files changed, 56 insertions, 16 deletions
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc index 77e809ee6..f4e73c833 100644 --- a/dev/ide_disk.cc +++ b/dev/ide_disk.cc @@ -55,8 +55,9 @@ using namespace std; IdeDisk::IdeDisk(const string &name, DiskImage *img, PhysicalMemory *phys, int id, int delay) - : SimObject(name), ctrl(NULL), image(img), physmem(phys), dmaTransferEvent(this), - dmaReadWaitEvent(this), dmaWriteWaitEvent(this), dmaPrdReadEvent(this), + : SimObject(name), ctrl(NULL), image(img), physmem(phys), + dmaTransferEvent(this), dmaReadWaitEvent(this), + dmaWriteWaitEvent(this), dmaPrdReadEvent(this), dmaReadEvent(this), dmaWriteEvent(this) { diskDelay = (delay * ticksPerSecond / 1000) / image->size(); @@ -379,8 +380,9 @@ IdeDisk::dmaWriteDone() } // copy the data to memory - Addr dmaAddr = - ctrl->tsunami->pchip->translatePciToDma(curPrd.getBaseAddr()); + Addr dmaAddr = ctrl->tsunami->pchip-> + translatePciToDma(curPrd.getBaseAddr()); + memcpy(physmem->dma_addr(dmaAddr, curPrd.getByteCount()), (void *)dataBuffer, curPrd.getByteCount()); @@ -665,7 +667,9 @@ IdeDisk::updateState(DevAction_t action) cmdReg.status |= STATUS_DRQ_BIT; // put the first two bytes into the data register - memcpy((void *)&cmdReg.data0, (void *)dataBuffer, sizeof(uint16_t)); + memcpy((void *)&cmdReg.data0, (void *)dataBuffer, + sizeof(uint16_t)); + // copy the data into the data buffer if (curCommand == WIN_IDENTIFY) memcpy((void *)dataBuffer, (void *)&driveID, @@ -753,7 +757,9 @@ IdeDisk::updateState(DevAction_t action) break; case Transfer_Data_Out: - if (action == ACT_DATA_WRITE_BYTE || action == ACT_DATA_WRITE_SHORT) { + if (action == ACT_DATA_WRITE_BYTE || + action == ACT_DATA_WRITE_SHORT) { + if (action == ACT_DATA_READ_BYTE) { panic("DEBUG: WRITING DATA ONE BYTE AT A TIME!\n"); } else { @@ -863,7 +869,8 @@ END_INIT_SIM_OBJECT_PARAMS(IdeDisk) CREATE_SIM_OBJECT(IdeDisk) { - return new IdeDisk(getInstanceName(), image, physmem, driveID, disk_delay); + return new IdeDisk(getInstanceName(), image, physmem, driveID, + disk_delay); } REGISTER_SIM_OBJECT("IdeDisk", IdeDisk) diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh index 9bb695bee..016f827cc 100644 --- a/dev/ide_disk.hh +++ b/dev/ide_disk.hh @@ -40,8 +40,8 @@ #define DMA_BACKOFF_PERIOD 200 -#define MAX_DMA_SIZE (16384) -#define MAX_MULTSECT (32) +#define MAX_DMA_SIZE (131072) // 256 * SectorSize (512) +#define MAX_MULTSECT (128) #define PRD_BASE_MASK 0xfffffffe #define PRD_COUNT_MASK 0xfffe diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc index 5f0521a2e..ea23cce08 100644 --- a/dev/tsunami_pchip.cc +++ b/dev/tsunami_pchip.cc @@ -18,6 +18,7 @@ #include "dev/tsunamireg.h" #include "dev/tsunami.hh" #include "mem/functional_mem/memory_control.hh" +#include "mem/functional_mem/physical_memory.hh" #include "sim/builder.hh" #include "sim/system.hh" @@ -217,12 +218,21 @@ TsunamiPChip::write(MemReqPtr &req, const uint8_t *data) return No_Fault; } +#define DMA_ADDR_MASK ULL(0x3ffffffff) + Addr TsunamiPChip::translatePciToDma(Addr busAddr) { // compare the address to the window base registers + uint64_t tbaMask = 0; + uint64_t baMask = 0; + uint64_t windowMask = 0; uint64_t windowBase = 0; + + uint64_t pteEntry = 0; + + Addr pteAddr; Addr dmaAddr; for (int i = 0; i < 4; i++) { @@ -230,15 +240,38 @@ TsunamiPChip::translatePciToDma(Addr busAddr) windowMask = ~wsm[i] & (0x7ff << 20); if ((busAddr & windowMask) == (windowBase & windowMask)) { - windowMask = (wsm[i] & (0x7ff << 20)) | 0xfffff; - if (wsba[i] & 0x1) { // see if enabled - if (wsba[i] & 0x2) // see if SG bit is set - panic("PCI to system SG mapping not currently implemented!\n"); - else - dmaAddr = (tba[i] & ~windowMask) | (busAddr & windowMask); - return dmaAddr; + if (wsba[i] & 0x1) { // see if enabled + if (wsba[i] & 0x2) { // see if SG bit is set + /** @todo + This currently is faked by just doing a direct + read from memory, however, to be realistic, this + needs to actually do a bus transaction. The process + is explained in the tsunami documentation on page + 10-12 and basically munges the address to look up a + PTE from a table in memory and then uses that mapping + to create an address for the SG page + */ + + tbaMask = ~(((wsm[i] & (0x7ff << 20)) >> 10) | 0x3ff); + baMask = (wsm[i] & (0x7ff << 20)) | (0x7f << 13); + pteAddr = (tba[i] & tbaMask) | ((busAddr & baMask) >> 10); + + memcpy((void *)&pteEntry, + tsunami->system-> + physmem->dma_addr(pteAddr, sizeof(uint64_t)), + sizeof(uint64_t)); + + dmaAddr = ((pteEntry & ~0x1) << 12) | (busAddr & 0xfff); + + } else { + baMask = (wsm[i] & (0x7ff << 20)) | 0xfffff; + tbaMask = ~baMask; + dmaAddr = (tba[i] & tbaMask) | (busAddr & baMask); + } + + return (dmaAddr & DMA_ADDR_MASK); } } } |