diff options
| author | Andrew Schultz <alschult@umich.edu> | 2004-02-16 01:33:43 -0500 |
|---|---|---|
| committer | Andrew Schultz <alschult@umich.edu> | 2004-02-16 01:33:43 -0500 |
| commit | 9c9d1cb5bfeecb2fe390a09044e98a63020fe6dd (patch) | |
| tree | 216e9e1f7a2109227928eac48c6e01f42550cd5d /dev | |
| parent | 484a4de65af86a86f436a50bc0ef88ea76447cf0 (diff) | |
| download | gem5-9c9d1cb5bfeecb2fe390a09044e98a63020fe6dd.tar.xz | |
Changed device IRQ back to 1
--HG--
extra : convert_revision : 3fb611e6e0305fe9854cdf7813492b75750cd7a9
Diffstat (limited to 'dev')
| -rw-r--r-- | dev/tsunami_cchip.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc index 4d436e895..375664be0 100644 --- a/dev/tsunami_cchip.cc +++ b/dev/tsunami_cchip.cc @@ -188,14 +188,14 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data) // The bit is now set and it wasn't before (set) if((dim[number] & bitvector) && (dir[number] & bitvector)) { - tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ0, x); + tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x); DPRINTF(Tsunami, "posting dir interrupt to cpu 0\n"); } else if (!(dir[number] & bitvector)) { // The bit was set and now its now clear and // we were interrupting on that bit before - tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ0, x); + tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x); DPRINTF(Tsunami, "dim write resulting in clear" "dir interrupt to cpu 0\n"); @@ -249,7 +249,7 @@ TsunamiCChip::postDRIR(uint32_t interrupt) for(int i=0; i < Tsunami::Max_CPUs; i++) { dir[i] = dim[i] & drir; if (dim[i] & bitvector) { - tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ0, interrupt); + tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ1, interrupt); DPRINTF(Tsunami, "posting dir interrupt to cpu %d," "interrupt %d\n",i, interrupt); } @@ -265,7 +265,7 @@ TsunamiCChip::clearDRIR(uint32_t interrupt) drir &= ~bitvector; for(int i=0; i < Tsunami::Max_CPUs; i++) { if (dir[i] & bitvector) { - tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ0, interrupt); + tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ1, interrupt); DPRINTF(Tsunami, "clearing dir interrupt to cpu %d," "interrupt %d\n",i, interrupt); |