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author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-11-28 13:54:42 +0100 |
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committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2018-12-04 10:34:26 +0000 |
commit | 174da8e2da6a896d2e97bc264f9c827a0f4c35ac (patch) | |
tree | b362adf7f2abf0cf309bf421ba0240c164791932 /ext/fputils/m4 | |
parent | fc09f4a24e22988cb89650b1d5b1f3716cf5c893 (diff) | |
download | gem5-174da8e2da6a896d2e97bc264f9c827a0f4c35ac.tar.xz |
mem-cache: Add getter and setter to CacheBlk::whenReady
Add a getter and a setter function to access CacheBlk::whenReady
to encapsulate the variable and allow error checking. This error
checking consists on verifying that writes to a block after it
has been inserted follow a chronological order.
As a side effect, tickInserted retain its value until updated,
that is, it is not reset in invalidate().
Change-Id: Idc3c5a99c3f002ee9acc2424f00e554877fd3a69
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/14715
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'ext/fputils/m4')
0 files changed, 0 insertions, 0 deletions