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author | Ciro Santilli <ciro.santilli@arm.com> | 2018-12-21 14:24:36 +0000 |
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committer | Ciro Santilli <ciro.santilli@arm.com> | 2019-01-22 11:35:12 +0000 |
commit | 6064582d714b40766e23f41a788f013fb435fdec (patch) | |
tree | 51e4987810c575570d2de19393d433d7eda6dcf0 /ext/gdb-xml/arm/arm-core.xml | |
parent | 9712a635a42bdf8db40ae0f48f8d515bea1927cf (diff) | |
download | gem5-6064582d714b40766e23f41a788f013fb435fdec.tar.xz |
ext: import GDB XML target description files for arm
The XML files were copied from the binutils-gdb source tree under
gdb/features at tag gdb-8.2-release Those XML files have a different
copyright header than the rest of binutils-gdb which allows them to be
copied into non-GPL projects.
Change-Id: I49bdeaad91ceb284c73cc0b861906ce09e44ca1d
Reviewed-on: https://gem5-review.googlesource.com/c/15256
Maintainer: Gabe Black <gabeblack@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'ext/gdb-xml/arm/arm-core.xml')
-rw-r--r-- | ext/gdb-xml/arm/arm-core.xml | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/ext/gdb-xml/arm/arm-core.xml b/ext/gdb-xml/arm/arm-core.xml new file mode 100644 index 000000000..dc9b3cf0f --- /dev/null +++ b/ext/gdb-xml/arm/arm-core.xml @@ -0,0 +1,31 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2007-2018 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.arm.core"> + <reg name="r0" bitsize="32" type="uint32"/> + <reg name="r1" bitsize="32" type="uint32"/> + <reg name="r2" bitsize="32" type="uint32"/> + <reg name="r3" bitsize="32" type="uint32"/> + <reg name="r4" bitsize="32" type="uint32"/> + <reg name="r5" bitsize="32" type="uint32"/> + <reg name="r6" bitsize="32" type="uint32"/> + <reg name="r7" bitsize="32" type="uint32"/> + <reg name="r8" bitsize="32" type="uint32"/> + <reg name="r9" bitsize="32" type="uint32"/> + <reg name="r10" bitsize="32" type="uint32"/> + <reg name="r11" bitsize="32" type="uint32"/> + <reg name="r12" bitsize="32" type="uint32"/> + <reg name="sp" bitsize="32" type="data_ptr"/> + <reg name="lr" bitsize="32"/> + <reg name="pc" bitsize="32" type="code_ptr"/> + + <!-- The CPSR is register 25, rather than register 16, because + the FPA registers historically were placed between the PC + and the CPSR in the "g" packet. --> + <reg name="cpsr" bitsize="32" regnum="25"/> +</feature> |