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authorRobert <robert.scheffel1@tu-dresden.de>2018-03-13 14:29:00 +0100
committerRobert Scheffel <robert.scheffel1@tu-dresden.de>2018-07-09 11:17:11 +0000
commit5de8ca95506a5f15bfbfdd2ca9babd282a882d1f (patch)
tree1bc429aa1896dea5167e37000428d157b1a0b710 /ext/libelf/SConscript
parent98cbcbb54f56475759fae747b60e47568617640f (diff)
downloadgem5-5de8ca95506a5f15bfbfdd2ca9babd282a882d1f.tar.xz
arch-riscv: enable rudimentary fs simulation
These changes enable a simple binary to be simulated in full system mode. Additionally, a new fault was implemented. It is executed once the CPU is initialized. This fault clears all interrupts and sets the pc to a reset vector. Change-Id: I50cfac91a61ba39a6ef3d38caca8794073887c88 Reviewed-on: https://gem5-review.googlesource.com/9061 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
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