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authorYasuko Eckert <yasuko.eckert@amd.com>2014-06-03 13:32:59 -0700
committerYasuko Eckert <yasuko.eckert@amd.com>2014-06-03 13:32:59 -0700
commit0deef376d96bfe0a3a2496714ac22471d9ee818a (patch)
tree43d383a5bc4315863240dd61f7a4077ce2ac86e7 /ext/mcpat/interconnect.h
parent1104199115a6ff5ed04f92ba6391f18728765014 (diff)
downloadgem5-0deef376d96bfe0a3a2496714ac22471d9ee818a.tar.xz
ext: McPAT interface changes and fixes
This patch includes software engineering changes and some generic bug fixes Joel Hestness and Yasuko Eckert made to McPAT 0.8. There are still known issues/concernts we did not have a chance to address in this patch. High-level changes in this patch include: 1) Making XML parsing modular and hierarchical: - Shift parsing responsibility into the components - Read XML in a (mostly) context-free recursive manner so that McPAT input files can contain arbitrary component hierarchies 2) Making power, energy, and area calculations a hierarchical and recursive process - Components track their subcomponents and recursively call compute functions in stages - Make C++ object hierarchy reflect inheritance of classes of components with similar structures - Simplify computeArea() and computeEnergy() functions to eliminate successive calls to calculate separate TDP vs. runtime energy - Remove Processor component (now unnecessary) and introduce a more abstract System component 3) Standardizing McPAT output across all components - Use a single, common data structure for storing and printing McPAT output - Recursively call print functions through component hierarchy 4) For caches, allow splitting data array and tag array reads and writes for better accuracy 5) Improving the usability of CACTI by printing more helpful warning and error messages 6) Minor: Impose more rigorous code style for clarity (more work still to be done) Overall, these changes greatly reduce the amount of replicated code, and they improve McPAT runtime and decrease memory footprint.
Diffstat (limited to 'ext/mcpat/interconnect.h')
-rw-r--r--ext/mcpat/interconnect.h86
1 files changed, 46 insertions, 40 deletions
diff --git a/ext/mcpat/interconnect.h b/ext/mcpat/interconnect.h
index 4cf42dafd..2ae39c5a2 100644
--- a/ext/mcpat/interconnect.h
+++ b/ext/mcpat/interconnect.h
@@ -2,6 +2,7 @@
* McPAT
* SOFTWARE LICENSE AGREEMENT
* Copyright 2012 Hewlett-Packard Development Company, L.P.
+ * Copyright (c) 2010-2013 Advanced Micro Devices, Inc.
* All Rights Reserved
*
* Redistribution and use in source and binary forms, with or without
@@ -25,7 +26,7 @@
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
@@ -42,46 +43,31 @@
#include "subarray.h"
#include "wire.h"
-// leakge power includes entire htree in a bank (when uca_tree == false)
-// leakge power includes only part to one bank when uca_tree == true
+class InterconnectParameters {
+public:
+ double active_ports;
+};
-class interconnect : public Component
-{
- public:
- interconnect(
- string name_,
- enum Device_ty device_ty_,
- double base_w, double base_h, int data_w, double len,
- const InputParameter *configure_interface, int start_wiring_level_,
- bool pipelinable_ = false,
- double route_over_perc_ =0.5,
- bool opt_local_=true,
- enum Core_type core_ty_=Inorder,
- enum Wire_type wire_model=Global,
- double width_s=1.0, double space_s=1.0,
- TechnologyParameter::DeviceType *dt = &(g_tp.peri_global)
- );
+class InterconnectStatistics {
+public:
+ double duty_cycle;
+ double accesses;
+};
- ~interconnect() {};
+class Interconnect : public McPATComponent {
+public:
+ static double width_scaling_threshold;
- void compute();
- string name;
- enum Device_ty device_ty;
+ enum Device_ty device_ty;
double in_rise_time, out_rise_time;
- InputParameter l_ip;
- uca_org_t local_result;
+ InputParameter l_ip;
+ uca_org_t local_result;
Area no_device_under_wire_area;
- void set_in_rise_time(double rt)
- {
- in_rise_time = rt;
- }
-
- void leakage_feedback(double temperature);
double max_unpipelined_link_delay;
powerDef power_bit;
double wire_bw;
- double init_wire_bw; // bus width at root
+ double init_wire_bw;
double base_width;
double base_height;
int data_width;
@@ -92,19 +78,39 @@ class interconnect : public Component
double min_w_nmos;
double min_w_pmos;
double latency, throughput;
- bool latency_overflow;
- bool throughput_overflow;
- double interconnect_latency;
- double interconnect_throughput;
+ bool latency_overflow;
+ bool throughput_overflow;
+ double interconnect_latency;
+ double interconnect_throughput;
bool opt_local;
enum Core_type core_ty;
bool pipelinable;
double route_over_perc;
- int num_pipe_stages;
-
- private:
- TechnologyParameter::DeviceType *deviceType;
+ int num_pipe_stages;
+ TechnologyParameter::DeviceType* deviceType;
+ InterconnectParameters int_params;
+ InterconnectStatistics int_stats;
+ Interconnect(XMLNode* _xml_data, string name_,
+ enum Device_ty device_ty_, double base_w,
+ double base_h, int data_w, double len,
+ const InputParameter *configure_interface,
+ int start_wiring_level_,
+ double _clockRate = 0.0f,
+ bool pipelinable_ = false, double route_over_perc_ = 0.5,
+ bool opt_local_ = true, enum Core_type core_ty_ = Inorder,
+ enum Wire_type wire_model = Global, double width_s = 1.0,
+ double space_s = 1.0,
+ TechnologyParameter::DeviceType *dt = &(g_tp.peri_global));
+private:
+ void calcWireData();
+public:
+ void computeArea();
+ void computeEnergy();
+ void set_params_stats(double active_ports,
+ double duty_cycle, double accesses);
+ void leakage_feedback(double temperature);
+ ~Interconnect() {};
};
#endif