summaryrefslogtreecommitdiff
path: root/ext/systemc/src/sysc/qt/md/iX86_64.s
diff options
context:
space:
mode:
authorMatthias Jung <jungma@eit.uni-kl.de>2017-03-01 18:39:56 +0100
committerMatthias Jung <jungma@eit.uni-kl.de>2017-05-18 08:36:56 +0000
commitaa651c7f8321bf96fc88f9a17285225000a753ec (patch)
treeb13240008c970b47bd74a5007e68136155d272fc /ext/systemc/src/sysc/qt/md/iX86_64.s
parent595e692de09e1b7cbc5f57ac01da299afc066fdd (diff)
downloadgem5-aa651c7f8321bf96fc88f9a17285225000a753ec.tar.xz
ext: Include SystemC 2.3.1 into gem5
In the past it happened several times that some changes in gem5 broke the SystemC coupling. Recently Accelera has changed the licence for SystemC from their own licence to Apache2.0, which is compatible with gem5. However, SystemC usually relies on the Boost library, but I was able to exchange the boost calls by c++11 alternatives. The recent SystemC version is placed into /ext and is integrated into gem5's build system. The goal is to integrate some SystemC tests for the CI in some following patches. Change-Id: I4b66ec806b5e3cffc1d7c85d3735ff4fa5b31fd0 Reviewed-on: https://gem5-review.googlesource.com/2240 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'ext/systemc/src/sysc/qt/md/iX86_64.s')
-rw-r--r--ext/systemc/src/sysc/qt/md/iX86_64.s74
1 files changed, 74 insertions, 0 deletions
diff --git a/ext/systemc/src/sysc/qt/md/iX86_64.s b/ext/systemc/src/sysc/qt/md/iX86_64.s
new file mode 100644
index 000000000..a8bcfcd96
--- /dev/null
+++ b/ext/systemc/src/sysc/qt/md/iX86_64.s
@@ -0,0 +1,74 @@
+/* iX386_64.s -- assembly support. */
+
+/*
+// QuickThreads -- Threads-building toolkit.
+// Copyright (c) 1993 by David Keppel
+//
+// Permission to use, copy, modify and distribute this software and
+// its documentation for any purpose and without fee is hereby
+// granted, provided that the above copyright notice and this notice
+// appear in all copies. This software is provided as a
+// proof-of-concept and for demonstration purposes; there is no
+// representation about the suitability of this software for any
+// purpose. */
+
+/* 64-bit Intel Architecture Support
+// written by Andy Goodrich, Forte Design Systms, Inc. */
+
+/* NOTE: double-labeled `_name' and `name' for System V compatability. */
+/* NOTE: Mixed C/C++-style comments used. Sorry! */
+
+ .text
+ .align 2
+
+ .globl _qt_abort
+ .globl qt_abort
+ .globl _qt_block
+ .globl qt_block
+ .globl _qt_blocki
+ .globl qt_blocki
+ .globl _qt_align
+ .globl qt_align
+
+_qt_abort:
+qt_abort:
+_qt_block:
+qt_block:
+_qt_blocki:
+qt_blocki:
+ /* 11 (return address.) */
+ pushq %rbp /* 10 (push stack frame top.) */
+ movq %rsp, %rbp /* set new stack frame top. */
+ /* save registers. */
+ subq $8, %rsp /* 9 (Stack alignment) */
+ pushq %r12 /* 8 ... */
+ pushq %r13 /* 7 ... */
+ pushq %r14 /* 6 ... */
+ pushq %r15 /* 5 ... */
+ pushq %rbx /* 4 ... */
+ pushq %rcx /* 3 ... (new stack address) */
+ pushq %rdx /* 2 ... (arg) */
+ pushq %rdi /* 1 ... (address of save function.) */
+ pushq %rsi /* 0 ... (cor) */
+
+ movq %rdi, %rax /* get address of save function. */
+ movq %rsp, %rdi /* set current stack as save argument. */
+ movq %rcx, %rsp /* swap stacks. */
+ movq %rcx, %rbp /* adjust stack frame pointer. */
+ addq $10*8, %rbp /* ... */
+ call *%rax /* call function to save stack pointer. */
+
+ /* restore registers. */
+ popq %rsi /* ... */
+ popq %rdi /* ... */
+ popq %rdx /* ... */
+ popq %rcx /* ... */
+ popq %rbx /* ... */
+ popq %r15 /* restore registers from new stack. */
+ popq %r14 /* ... */
+ popq %r13 /* ... */
+ popq %r12 /* ... */
+ leave /* unwind stack. */
+_qt_align:
+qt_align:
+ ret /* return. */