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authorAli Saidi <saidi@eecs.umich.edu>2006-04-20 17:14:30 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-04-20 17:14:30 -0400
commit6dc3b2fa395601852cb3efff302229907b1759f8 (patch)
tree466acd07de93a29ce641b85a967a4af3cd308599 /mem/physical.cc
parent9a415916932f43e31b3044724b8741cd06ed9182 (diff)
downloadgem5-6dc3b2fa395601852cb3efff302229907b1759f8.tar.xz
make ide disk work for newmem
SConscript: compile ide devices base/chunk_generator.hh: add another parameter to the chuck generator called complete() which returns the number of bytes transfered so far. Very useful for adding to a pointer. configs/test/fs.py: Add ide disk to fs test configuration dev/ide_ctrl.cc: dev/ide_ctrl.hh: dev/ide_disk.cc: dev/ide_disk.hh: dev/io_device.cc: dev/io_device.hh: dev/pciconfigall.cc: dev/pciconfigall.hh: dev/pcidev.cc: dev/pcidev.hh: update for new memory system mem/bus.cc: support devices that return multiple ranges remove old ranges before using new info mem/packet.hh: make senderstate void* per steve's request that we use every construct possible in C++ mem/physical.cc: have memory stamp the packet with the time. mem/physical.hh: actually set the memory latency variable python/m5/objects/Device.py: Add DmaDevice python/m5/objects/Ide.py: Ide disk no longer has a physmem pointer python/m5/objects/Pci.py: update pci device for newmem python/m5/objects/PhysicalMemory.py: add latency parameter for physical memory sim/byteswap.hh: use fast architecture dependent byteswap calls if they exist --HG-- extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793
Diffstat (limited to 'mem/physical.cc')
-rw-r--r--mem/physical.cc11
1 files changed, 7 insertions, 4 deletions
diff --git a/mem/physical.cc b/mem/physical.cc
index b00935990..a15a59106 100644
--- a/mem/physical.cc
+++ b/mem/physical.cc
@@ -69,8 +69,8 @@ PhysicalMemory::MemResponseEvent::description()
return "Physical Memory Timing Access respnse event";
}
-PhysicalMemory::PhysicalMemory(const string &n)
- : MemObject(n), base_addr(0), pmem_addr(NULL), port(NULL)
+PhysicalMemory::PhysicalMemory(const string &n, Tick latency)
+ : MemObject(n),base_addr(0), pmem_addr(NULL), port(NULL), lat(latency)
{
// Hardcoded to 128 MB for now.
pmem_size = 1 << 27;
@@ -137,6 +137,7 @@ Tick
PhysicalMemory::doAtomicAccess(Packet &pkt)
{
doFunctionalAccess(pkt);
+ pkt.time = curTick + lat;
return curTick + lat;
}
@@ -344,20 +345,22 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
Param<string> file;
Param<Range<Addr> > range;
+ Param<Tick> latency;
END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
INIT_PARAM_DFLT(file, "memory mapped file", ""),
- INIT_PARAM(range, "Device Address Range")
+ INIT_PARAM(range, "Device Address Range"),
+ INIT_PARAM(latency, "Memory access latency")
END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
CREATE_SIM_OBJECT(PhysicalMemory)
{
- return new PhysicalMemory(getInstanceName());
+ return new PhysicalMemory(getInstanceName(), latency);
}
REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)