Replace Memory with MemObject; no need for two different levels of hierarchy there.

Get rid of addPort().
Change getPort() behavior on PhysicalMemory.

SConscript:
cpu/simple/cpu.hh:
sim/system.cc:
sim/system.hh:
    Replace Memory with MemObject.
cpu/base.hh:
    No need to declare Port here anymore.
cpu/cpu_exec_context.hh:
    Need PageTable definition.
cpu/simple/cpu.cc:
mem/physical.cc:
mem/physical.hh:
    Replace Memory with MemObject.
    Get rid of addPort(); allow getting anonymous ports with getPort().
mem/translating_port.hh:
    Remove unneeded header.
sim/process.cc:
    Replace Memory with MemObject.
    Change how initialization port gets set up to deal with change in
    addPort()/getPort().  Current solution is not ideal but it works.
sim/process.hh:
    Remove unneeded headers and declarations.
    Make LiveProcess::getDesc() abstract instead of panicing if called.
sim/syscall_emul.hh:
    Fix includes.

--HG--
extra : convert_revision : 11d4ffb54230038afcf7219cc46e51f809329a2f

1 files changed, 0 insertions, 2 deletions

diff --git a/mem/translating_port.hh b/mem/translating_port.hh
index acbc3fabc..2ba3d68e2 100644
--- a/mem/translating_port.hh
+++ b/mem/translating_port.hh
@@ -29,8 +29,6 @@
 #ifndef __MEM_TRANSLATING_PROT_HH__
 #define __MEM_TRANSLATING_PROT_HH__
 
-#include "mem/memory.hh"
-
 class Port;
 class PageTable;