make ide disk work for newmem

SConscript:
    compile ide devices
base/chunk_generator.hh:
    add another parameter to the chuck generator called complete() which
    returns the number of bytes transfered so far. Very useful for
    adding to a pointer.
configs/test/fs.py:
    Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
    update for new memory system
mem/bus.cc:
    support devices that return multiple ranges
    remove old ranges before using new info
mem/packet.hh:
    make senderstate void* per steve's request that we use every
    construct possible in C++
mem/physical.cc:
    have memory stamp the packet with the time.
mem/physical.hh:
    actually set the memory latency variable
python/m5/objects/Device.py:
    Add DmaDevice
python/m5/objects/Ide.py:
    Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
    update pci device for newmem
python/m5/objects/PhysicalMemory.py:
    add latency parameter for physical memory
sim/byteswap.hh:
    use fast architecture dependent byteswap calls if they exist

--HG--
extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793

4 files changed, 29 insertions, 17 deletions

diff --git a/mem/bus.cc b/mem/bus.cc
index 5e84beb83..86e834894 100644
--- a/mem/bus.cc
+++ b/mem/bus.cc
@@ -97,21 +97,30 @@ Bus::recvStatusChange(Port::Status status, int id)
     Port *port = interfaces[id];
     AddrRangeList ranges;
     AddrRangeList snoops;
+    AddrRangeIter iter;
+    std::vector<DevMap>::iterator portIter;
+
+    // Clean out any previously existent ids
+    for (portIter = portList.begin(); portIter != portList.end(); ) {
+        if (portIter->portId == id)
+            portIter = portList.erase(portIter);
+        else
+            portIter++;
+    }
 
     port->getPeerAddressRanges(ranges, snoops);
 
     // not dealing with snooping yet either
     assert(snoops.size() == 0);
-    // or multiple ranges
-    assert(ranges.size() == 1);
-
-    DevMap dm;
-    dm.portId = id;
-    dm.range = ranges.front();
-
-    DPRINTF(MMU, "Adding range %llx - %llx for id %d\n", dm.range.start,
-            dm.range.end, id);
-    portList.push_back(dm);
+    for(iter = ranges.begin(); iter != ranges.end(); iter++) {
+        DevMap dm;
+        dm.portId = id;
+        dm.range = *iter;
+
+        DPRINTF(MMU, "Adding range %llx - %llx for id %d\n", dm.range.start,
+                dm.range.end, id);
+        portList.push_back(dm);
+    }
     DPRINTF(MMU, "port list has %d entries\n", portList.size());
 }
 
diff --git a/mem/packet.hh b/mem/packet.hh
index 843d34ac0..79fe0ea06 100644
--- a/mem/packet.hh
+++ b/mem/packet.hh
@@ -92,7 +92,7 @@ struct Packet
                            // assert(dynamic_cast<Foo>) etc.
 
     /** A virtual base opaque structure used to hold the senders state. */
-    SenderState *senderState; // virtual base opaque,
+    void *senderState; // virtual base opaque,
                            // assert(dynamic_cast<Foo>) etc.
 
     /** A pointer to the data being transfered.  It can be differnt sizes
diff --git a/mem/physical.cc b/mem/physical.cc
index b00935990..a15a59106 100644
--- a/mem/physical.cc
+++ b/mem/physical.cc
@@ -69,8 +69,8 @@ PhysicalMemory::MemResponseEvent::description()
     return "Physical Memory Timing Access respnse event";
 }
 
-PhysicalMemory::PhysicalMemory(const string &n)
-    : MemObject(n), base_addr(0), pmem_addr(NULL), port(NULL)
+PhysicalMemory::PhysicalMemory(const string &n, Tick latency)
+    : MemObject(n),base_addr(0), pmem_addr(NULL), port(NULL), lat(latency)
 {
     // Hardcoded to 128 MB for now.
     pmem_size = 1 << 27;
@@ -137,6 +137,7 @@ Tick
 PhysicalMemory::doAtomicAccess(Packet &pkt)
 {
     doFunctionalAccess(pkt);
+    pkt.time = curTick + lat;
     return curTick + lat;
 }
 
@@ -344,20 +345,22 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
 
     Param<string> file;
     Param<Range<Addr> > range;
+    Param<Tick> latency;
 
 END_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory)
 
 BEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
 
     INIT_PARAM_DFLT(file, "memory mapped file", ""),
-    INIT_PARAM(range, "Device Address Range")
+    INIT_PARAM(range, "Device Address Range"),
+    INIT_PARAM(latency, "Memory access latency")
 
 END_INIT_SIM_OBJECT_PARAMS(PhysicalMemory)
 
 CREATE_SIM_OBJECT(PhysicalMemory)
 {
 
-    return new PhysicalMemory(getInstanceName());
+    return new PhysicalMemory(getInstanceName(), latency);
 }
 
 REGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory)
diff --git a/mem/physical.hh b/mem/physical.hh
index ce0a2099c..f87683c45 100644
--- a/mem/physical.hh
+++ b/mem/physical.hh
@@ -71,7 +71,6 @@ class PhysicalMemory : public MemObject
 
     int numPorts;
 
-    int lat;
 
     struct MemResponseEvent : public Event
     {
@@ -94,13 +93,14 @@ class PhysicalMemory : public MemObject
     uint8_t *pmem_addr;
     MemoryPort *port;
     int page_ptr;
+    Tick lat;
 
   public:
     Addr new_page();
     uint64_t size() { return pmem_size; }
 
   public:
-    PhysicalMemory(const std::string &n);
+    PhysicalMemory(const std::string &n, Tick latency);
     virtual ~PhysicalMemory();
 
   public: