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author | Ron Dreslinski <rdreslin@umich.edu> | 2006-03-14 18:03:34 -0500 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-03-14 18:03:34 -0500 |
commit | 7405a3530b99f57b1d4a427a47e285afe5dd6e7f (patch) | |
tree | 81c4bc8b7449e690725719c02b0f851c895c268e /mem | |
parent | 918b3f59c2822605e8959fb7195c3da59baaa528 (diff) | |
download | gem5-7405a3530b99f57b1d4a427a47e285afe5dd6e7f.tar.xz |
Remove unneeded header files.
Add some forward declerations.
Fix ordering problem of variables in constructor (see sourceforge)
Factor out code from header into _impl file to speed building process (keep cache_builder smaller in size)
--HG--
extra : convert_revision : 20087f88f95628af716094e09c2287e09580149e
Diffstat (limited to 'mem')
-rw-r--r-- | mem/cache/prefetch/tagged_prefetcher_impl.hh | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/mem/cache/prefetch/tagged_prefetcher_impl.hh b/mem/cache/prefetch/tagged_prefetcher_impl.hh new file mode 100644 index 000000000..6c27256a9 --- /dev/null +++ b/mem/cache/prefetch/tagged_prefetcher_impl.hh @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2005 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @file + * Describes a tagged prefetcher based on template policies. + */ + +#include "mem/cache/prefetch/tagged_prefetcher.hh" + +template <class TagStore, class Buffering> +TaggedPrefetcher<TagStore, Buffering>:: +TaggedPrefetcher(int size, bool pageStop, bool serialSquash, + bool cacheCheckPush, bool onlyData, + Tick latency, int degree) + :Prefetcher<TagStore, Buffering>(size, pageStop, serialSquash, + cacheCheckPush, onlyData), + latency(latency), degree(degree) +{ +} + +template <class TagStore, class Buffering> +void +TaggedPrefetcher<TagStore, Buffering>:: +calculatePrefetch(MemReqPtr &req, std::list<Addr> &addresses, + std::list<Tick> &delays) +{ + Addr blkAddr = req->paddr & ~(Addr)(this->blkSize-1); + + for (int d=1; d <= degree; d++) { + Addr newAddr = blkAddr + d*(this->blkSize); + if (this->pageStop && + (blkAddr & ~(TheISA::VMPageSize - 1)) != + (newAddr & ~(TheISA::VMPageSize - 1))) + { + //Spanned the page, so now stop + this->pfSpanPage += degree - d + 1; + return; + } + else + { + addresses.push_back(newAddr); + delays.push_back(latency); + } + } +} + + |