SimpleCPU compiles with merge.

arch/alpha/isa_traits.hh:
arch/alpha/linux/process.cc:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
base/chunk_generator.hh:
base/loader/elf_object.cc:
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
cpu/simple/cpu.cc:
kern/linux/linux.hh:
kern/tru64/tru64.hh:
mem/packet.hh:
mem/page_table.cc:
mem/page_table.hh:
mem/physical.cc:
mem/request.hh:
mem/translating_port.cc:
sim/process.hh:
sim/system.cc:
    Fixing merged changes.

--HG--
extra : convert_revision : 2e94f21009395db654880fcb94ec806b6f5772c3

6 files changed, 27 insertions, 20 deletions

diff --git a/mem/packet.hh b/mem/packet.hh
index ef4eb85d9..260fc60f7 100644
--- a/mem/packet.hh
+++ b/mem/packet.hh
@@ -36,7 +36,7 @@
 #define __MEM_PACKET_HH__
 
 #include "mem/request.hh"
-#include "targetarch/isa_traits.hh"
+#include "arch/isa_traits.hh"
 #include "sim/root.hh"
 
 struct Packet;
diff --git a/mem/page_table.cc b/mem/page_table.cc
index 63b60de24..714ddde35 100644
--- a/mem/page_table.cc
+++ b/mem/page_table.cc
@@ -34,6 +34,7 @@
 #include <map>
 #include <fstream>
 
+#include "arch/faults.hh"
 #include "base/bitfield.hh"
 #include "base/intmath.hh"
 #include "base/trace.hh"
@@ -43,6 +44,7 @@
 #include "sim/system.hh"
 
 using namespace std;
+using namespace TheISA;
 
 PageTable::PageTable(System *_system, Addr _pageSize)
     : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
@@ -61,23 +63,23 @@ PageTable::page_check(Addr addr, int size) const
     if (size < sizeof(uint64_t)) {
         if (!isPowerOf2(size)) {
             panic("Invalid request size!\n");
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
         }
 
         if ((size - 1) & addr)
-            return Alignment_Fault;
+            return genAlignmentFault();
     }
     else {
         if ((addr & (VMPageSize - 1)) + size > VMPageSize) {
             panic("Invalid request size!\n");
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
         }
 
         if ((sizeof(uint64_t) - 1) & addr)
-            return Alignment_Fault;
+            return genAlignmentFault();
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 
@@ -123,7 +125,7 @@ PageTable::translate(CpuRequestPtr &req)
 {
     assert(pageAlign(req->vaddr + req->size - 1) == pageAlign(req->vaddr));
     if (!translate(req->vaddr, req->paddr)) {
-        return Machine_Check_Fault;
+        return genMachineCheckFault();
     }
     return page_check(req->paddr, req->size);
 }
diff --git a/mem/page_table.hh b/mem/page_table.hh
index d318783be..8f0842f58 100644
--- a/mem/page_table.hh
+++ b/mem/page_table.hh
@@ -37,6 +37,7 @@
 #include <string>
 #include <map>
 
+#include "arch/isa_traits.hh"
 #include "base/trace.hh"
 #include "mem/request.hh"
 #include "mem/packet.hh"
@@ -59,7 +60,7 @@ class PageTable
 
   public:
 
-    PageTable(System *_system, Addr _pageSize = VMPageSize);
+    PageTable(System *_system, Addr _pageSize = TheISA::VMPageSize);
 
     ~PageTable();
 
diff --git a/mem/physical.cc b/mem/physical.cc
index 69544c8fe..c69cfd538 100644
--- a/mem/physical.cc
+++ b/mem/physical.cc
@@ -44,10 +44,11 @@
 #include "sim/host.hh"
 #include "sim/builder.hh"
 #include "sim/eventq.hh"
-#include "targetarch/isa_traits.hh"
+#include "arch/isa_traits.hh"
 
 
 using namespace std;
+using namespace TheISA;
 
 PhysicalMemory::MemResponseEvent::MemResponseEvent(Packet &pkt, MemoryPort* _m)
     : Event(&mainEventQueue, CPU_Tick_Pri), pkt(pkt), memoryPort(_m)
diff --git a/mem/request.hh b/mem/request.hh
index c3c1d0fd4..5e2275741 100644
--- a/mem/request.hh
+++ b/mem/request.hh
@@ -34,7 +34,7 @@
 #ifndef __MEM_REQUEST_HH__
 #define __MEM_REQUEST_HH__
 
-#include "targetarch/isa_traits.hh"
+#include "arch/isa_traits.hh"
 
 class Request;
 class CpuRequest;
diff --git a/mem/translating_port.cc b/mem/translating_port.cc
index f4f2ca737..42101dad0 100644
--- a/mem/translating_port.cc
+++ b/mem/translating_port.cc
@@ -27,11 +27,14 @@
  */
 
 #include <string>
+#include "arch/faults.hh"
 #include "base/chunk_generator.hh"
 #include "mem/port.hh"
 #include "mem/translating_port.hh"
 #include "mem/page_table.hh"
 
+using namespace TheISA;
+
 TranslatingPort::TranslatingPort(Port *_port, PageTable *p_table)
     : port(_port), pTable(p_table)
 { }
@@ -48,13 +51,13 @@ TranslatingPort::readBlobFunctional(Addr addr, uint8_t *p, int size)
     for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
 
         if (!pTable->translate(gen.addr(),paddr))
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
 
         port->readBlobFunctional(paddr, p + prevSize, gen.size());
         prevSize += gen.size();
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 Fault
@@ -72,7 +75,7 @@ TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
                                  VMPageSize);
                 pTable->translate(gen.addr(), paddr);
             } else {
-                return Machine_Check_Fault;
+                return genMachineCheckFault();
             }
         }
 
@@ -80,7 +83,7 @@ TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
         prevSize += gen.size();
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 
@@ -98,14 +101,14 @@ TranslatingPort::memsetBlobFunctional(Addr addr, uint8_t val, int size,
                                  VMPageSize);
                 pTable->translate(gen.addr(), paddr);
             } else {
-                return Machine_Check_Fault;
+                return genMachineCheckFault();
             }
         }
 
         port->memsetBlobFunctional(paddr, val, gen.size());
     }
 
-    return No_Fault;
+    return NoFault;
 }
 
 
@@ -120,12 +123,12 @@ TranslatingPort::writeStringFunctional(Addr addr, const char *str)
     do {
         c = *str++;
         if (!pTable->translate(vaddr++,paddr))
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
 
         port->writeBlobFunctional(paddr, &c, 1);
     } while (c);
 
-    return No_Fault;
+    return NoFault;
 }
 
 Fault
@@ -138,12 +141,12 @@ TranslatingPort::readStringFunctional(std::string &str, Addr addr)
 
     do {
         if (!pTable->translate(vaddr++,paddr))
-            return Machine_Check_Fault;
+            return genMachineCheckFault();
 
         port->readBlobFunctional(paddr, &c, 1);
         str += c;
     } while (c);
 
-    return No_Fault;
+    return NoFault;
 }