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author | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-15 17:04:50 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-03-15 17:04:50 -0500 |
commit | 97e424982ad99348bc27ab2ca79d0861cddfe4d1 (patch) | |
tree | 241a53300ee767c392f91ff269d599fb05ebce77 /mem | |
parent | 0d8cfed042cbd987fd5b9c5d9307d8c34225c90e (diff) | |
download | gem5-97e424982ad99348bc27ab2ca79d0861cddfe4d1.tar.xz |
add translations for new sections that are mmapped or when the brk
is changed
Add a default machine width parameter
Arch based live processes
arch/alpha/linux/process.cc:
arch/alpha/linux/process.hh:
arch/alpha/process.cc:
arch/alpha/process.hh:
arch/alpha/tru64/process.cc:
arch/alpha/tru64/process.hh:
arch/mips/linux_process.cc:
arch/mips/process.cc:
arch/mips/process.hh:
arch/sparc/linux/process.cc:
arch/sparc/linux/process.hh:
arch/sparc/process.cc:
arch/sparc/process.hh:
configs/test/test.py:
python/m5/objects/Process.py:
sim/process.cc:
sim/process.hh:
Architecture based live processes
arch/mips/isa_traits.hh:
arch/sparc/isa_traits.hh:
Add a default machine width parameter
mem/port.hh:
gcc 4 really wants a virtual destructor
sim/byteswap.hh:
remove the comment around long and unsigned long even though uint32_t
and int32_t are defined. Seems to work with gcc 4 and 3.4.3.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
add translations for new sections that are mmapped or when the brk
is changed
--HG--
extra : convert_revision : e2f9f228113c7127c87ef2358209a399c30ed5c6
Diffstat (limited to 'mem')
-rw-r--r-- | mem/port.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/mem/port.hh b/mem/port.hh index ea2929a81..947e7896a 100644 --- a/mem/port.hh +++ b/mem/port.hh @@ -71,6 +71,7 @@ class Port { public: + virtual ~Port() {}; // mey be better to use subclasses & RTTI? /** Holds the ports status. Keeps track if it is blocked, or has calculated a range change. */ |