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author | Nathan Binkert <binkertn@umich.edu> | 2005-03-11 18:32:36 -0500 |
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committer | Nathan Binkert <binkertn@umich.edu> | 2005-03-11 18:32:36 -0500 |
commit | e6902a907e333c09d64d520f4c978edf7e098f6a (patch) | |
tree | 5b0acd0444285290365fbead19f081b8f3ebdd9a /python/m5/objects/BaseCPU.mpy | |
parent | b1f41a7aa0f617014d2bf6d5d3675830ffac213c (diff) | |
parent | fa1650a08e56b176c2b31cd5c3b8939820e93884 (diff) | |
download | gem5-e6902a907e333c09d64d520f4c978edf7e098f6a.tar.xz |
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5
into ziff.eecs.umich.edu:/z/binkertn/research/m5/current
--HG--
extra : convert_revision : abc24d21097770ad323a2c0d537d3e9424db0d7d
Diffstat (limited to 'python/m5/objects/BaseCPU.mpy')
-rw-r--r-- | python/m5/objects/BaseCPU.mpy | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/python/m5/objects/BaseCPU.mpy b/python/m5/objects/BaseCPU.mpy new file mode 100644 index 000000000..484fcccd6 --- /dev/null +++ b/python/m5/objects/BaseCPU.mpy @@ -0,0 +1,25 @@ +simobj BaseCPU(SimObject): + type = 'BaseCPU' + abstract = True + icache = Param.BaseMem(NULL, "L1 instruction cache object") + dcache = Param.BaseMem(NULL, "L1 data cache object") + + if Bool._convert(env.get('FULL_SYSTEM', 'False')): + dtb = Param.AlphaDTB("Data TLB") + itb = Param.AlphaITB("Instruction TLB") + mem = Param.FunctionalMemory("memory") + system = Param.BaseSystem(Super, "system object") + else: + workload = VectorParam.Process("processes to run") + + max_insts_all_threads = Param.Counter(0, + "terminate when all threads have reached this inst count") + max_insts_any_thread = Param.Counter(0, + "terminate when any thread reaches this inst count") + max_loads_all_threads = Param.Counter(0, + "terminate when all threads have reached this load count") + max_loads_any_thread = Param.Counter(0, + "terminate when any thread reaches this load count") + + defer_registration = Param.Bool(False, + "defer registration with system (for sampling)") |