fullsys now builds and runs for about one cycle

SConscript:
    easier to fix than temporarily remove
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    mem needed for both fullsys and syscall
dev/baddev.cc:
    fix for new mem system
dev/io_device.cc:
    fix typo
dev/io_device.hh:
    PioDevice needs to be a memobject
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
    fix for new mem systems
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
    rather than the platform have a pointer to pciconfig, go the other
    way so all devices are the same and can have a platform pointer
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart8250.cc:
python/m5/objects/AlphaConsole.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Device.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/System.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
    fixes for newmem

--HG--
extra : convert_revision : b7b67e19095cca64889f6307725aa2f3d84c7105

1 files changed, 8 insertions, 29 deletions

diff --git a/python/m5/objects/Device.py b/python/m5/objects/Device.py
index d7ca014a9..cda3b1824 100644
--- a/python/m5/objects/Device.py
+++ b/python/m5/objects/Device.py
@@ -1,35 +1,14 @@
 from m5 import *
-from FunctionalMemory import FunctionalMemory
+from MemObject import MemObject
 
-# This device exists only because there are some devices that I don't
-# want to have a Platform parameter because it would cause a cycle in
-# the C++ that cannot be easily solved.
-#
-# The real solution to this problem is to pass the ParamXXX structure
-# to the constructor, but with the express condition that SimObject
-# parameter values are not to be available at construction time.  If
-# some further configuration must be done, it must be done during the
-# initialization phase at which point all SimObject pointers will be
-# valid.
-class FooPioDevice(FunctionalMemory):
+class PioDevice(MemObject):
     type = 'PioDevice'
     abstract = True
-    addr = Param.Addr("Device Address")
-    mmu = Param.MemoryController(Parent.any, "Memory Controller")
-    pio_bus = Param.Bus(NULL, "Bus to attach to for PIO")
-    pio_latency = Param.Tick(1, "Programmed IO latency in bus cycles")
+    platform = Param.Platform(Parent.any, "Platform this device is part of")
+    system = Param.System(Parent.any, "System this device is part of")
 
-class FooDmaDevice(FooPioDevice):
-    type = 'DmaDevice'
+class BasicPioDevice(PioDevice):
+    type = 'BasicPioDevice'
     abstract = True
-    dma_bus = Param.Bus(Self.pio_bus, "Bus to attach to for DMA")
-
-class PioDevice(FooPioDevice):
-    type = 'PioDevice'
-    abstract = True
-    platform = Param.Platform(Parent.any, "Platform")
-
-class DmaDevice(PioDevice):
-    type = 'DmaDevice'
-    abstract = True
-    dma_bus = Param.Bus(Self.pio_bus, "Bus to attach to for DMA")
+    pio_addr = Param.Addr("Device Address")
+    pio_latency = Param.Tick(1, "Programmed IO latency in simticks")