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author | Gabe Black <gblack@eecs.umich.edu> | 2006-03-09 18:35:28 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-03-09 18:35:28 -0500 |
commit | 872bbdfc33cb82bf32576db3a57d3055a04acbac (patch) | |
tree | 837dd214bd682ac7efa515b18857bec7d4d35bef /python/m5/objects/Ethernet.py | |
parent | 3adb45144aca819c9796168ecde7a263169d9d4d (diff) | |
parent | 7b283dbc090d1197593b00fd1279b92f7c2e693e (diff) | |
download | gem5-872bbdfc33cb82bf32576db3a57d3055a04acbac.tar.xz |
Hand merge. Stuff probably doesn't compile.
--HG--
rename : arch/alpha/isa_desc => arch/alpha/isa/main.isa
rename : arch/alpha/alpha_linux_process.cc => arch/alpha/linux/process.cc
rename : arch/alpha/alpha_linux_process.hh => arch/alpha/linux/process.hh
rename : arch/alpha/alpha_tru64_process.cc => arch/alpha/tru64/process.cc
rename : arch/alpha/alpha_tru64_process.hh => arch/alpha/tru64/process.hh
rename : cpu/exec_context.cc => cpu/cpu_exec_context.cc
rename : cpu/exec_context.hh => cpu/cpu_exec_context.hh
extra : convert_revision : 7d1efcedd708815d985a951f6f010fbd83dc27e8
Diffstat (limited to 'python/m5/objects/Ethernet.py')
-rw-r--r-- | python/m5/objects/Ethernet.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/python/m5/objects/Ethernet.py b/python/m5/objects/Ethernet.py index 2edc7576e..22714e15c 100644 --- a/python/m5/objects/Ethernet.py +++ b/python/m5/objects/Ethernet.py @@ -75,7 +75,6 @@ class EtherDevBase(PciDevice): dma_write_delay = Param.Latency('0us', "fixed delay for dma writes") dma_write_factor = Param.Latency('0us', "multiplier for dma writes") dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") - pio_delay_write = Param.Bool(False, "Delay pio writes until timing occurs") rx_delay = Param.Latency('1us', "Receive Delay") tx_delay = Param.Latency('1us', "Transmit Delay") @@ -86,6 +85,7 @@ class EtherDevBase(PciDevice): intr_delay = Param.Latency('10us', "Interrupt propagation delay") rx_thread = Param.Bool(False, "dedicated kernel thread for transmit") tx_thread = Param.Bool(False, "dedicated kernel threads for receive") + rss = Param.Bool(False, "Receive Side Scaling") class NSGigE(EtherDevBase): type = 'NSGigE' |