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authorBenjamin Nash <benash@umich.edu>2005-06-09 15:01:15 -0400
committerBenjamin Nash <benash@umich.edu>2005-06-09 15:01:15 -0400
commitc4fdfa3844ec0e1ae6f34660024ee33170445b8d (patch)
tree172be4e7ad9e9361efff8b745197883d0035f7fb /python/m5/objects/System.py
parent4cc9fbf61d70668a8d80681998a1db2b2e1b4a41 (diff)
downloadgem5-c4fdfa3844ec0e1ae6f34660024ee33170445b8d.tar.xz
Mostly IO modifications, to increase compatibility with FreeBSD.
dev/pcidev.cc: Allow writes to some PCI read-only registers. Fix problem when writing to a zero offset IO location. dev/tsunami_io.cc: Fix calculation of IO addresses. Add registers for keyboard and PCI DMA. dev/tsunamireg.h: Add registers for keyboard and PCI DMA. python/m5/objects/System.py: Allow generic System to be instantiated. --HG-- extra : convert_revision : 1b985ffa2b8e15aa55246f1d14da615c32ecd3f9
Diffstat (limited to 'python/m5/objects/System.py')
-rw-r--r--python/m5/objects/System.py3
1 files changed, 2 insertions, 1 deletions
diff --git a/python/m5/objects/System.py b/python/m5/objects/System.py
index c247983c5..c73d9a893 100644
--- a/python/m5/objects/System.py
+++ b/python/m5/objects/System.py
@@ -1,6 +1,7 @@
from m5 import *
class System(SimObject):
- type = 'BaseSystem'
+ #type = 'BaseSystem'
+ type = 'System'
boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency,
"boot processor frequency")
memctrl = Param.MemoryController(Parent.any, "memory controller")