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| author | Ali Saidi <saidi@eecs.umich.edu> | 2005-11-02 14:56:18 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2005-11-02 14:56:18 -0500 |
| commit | 3b66cb49ecf29e762f4659ed174ca76b8f553a1e (patch) | |
| tree | b8f29795c7abf7c93882881252aff716fb33ee02 /python/m5/objects | |
| parent | 0523736b96b2779f8a33c2315c94be55d0a4d9c7 (diff) | |
| parent | a0829a7780b110a912ffc250d424b6dfe3586e62 (diff) | |
| download | gem5-3b66cb49ecf29e762f4659ed174ca76b8f553a1e.tar.xz | |
Merge zizzer:/bk/m5
into zeep.eecs.umich.edu:/z/saidi/work/m5
--HG--
extra : convert_revision : 3cc23080d19cc464a8ba7c1c93b6e5d45af7d463
Diffstat (limited to 'python/m5/objects')
| -rw-r--r-- | python/m5/objects/Ethernet.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/python/m5/objects/Ethernet.py b/python/m5/objects/Ethernet.py index 3ad6b57f9..a2a8b217f 100644 --- a/python/m5/objects/Ethernet.py +++ b/python/m5/objects/Ethernet.py @@ -84,6 +84,7 @@ class EtherDevBase(PciDevice): rx_filter = Param.Bool(True, "Enable Receive Filter") intr_delay = Param.Latency('10us', "Interrupt Propagation Delay") + dedicated = Param.Bool(False, "dedicate a kernel thread to the driver") class NSGigE(EtherDevBase): type = 'NSGigE' @@ -91,7 +92,6 @@ class NSGigE(EtherDevBase): dma_data_free = Param.Bool(False, "DMA of Data is free") dma_desc_free = Param.Bool(False, "DMA of Descriptors is free") - dedicated = Param.Bool(False, "dedicate a kernel thread to the driver") class NSGigEInt(EtherInt): type = 'NSGigEInt' @@ -102,6 +102,7 @@ class Sinic(EtherDevBase): rx_max_copy = Param.MemorySize('1514B', "rx max copy") tx_max_copy = Param.MemorySize('16kB', "tx max copy") + rx_max_intr = Param.UInt32(10, "max rx packets per interrupt") rx_fifo_threshold = Param.MemorySize('48kB', "rx fifo high threshold") tx_fifo_threshold = Param.MemorySize('16kB', "tx fifo low threshold") |