diff options
| author | Kevin Lim <ktlim@umich.edu> | 2005-05-02 14:16:33 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2005-05-02 14:16:33 -0400 |
| commit | 6191d3e4443b5337232a238a3a0dd5d11249e223 (patch) | |
| tree | 4adb8d7c510a8b123b285e0cd0cb2d74f093a108 /python/m5/objects | |
| parent | e2ad9e68160659712f017a2aa24cc2acc29cd7f0 (diff) | |
| parent | 950ce813c436cd5a70ed44794f0508799c09ed3a (diff) | |
| download | gem5-6191d3e4443b5337232a238a3a0dd5d11249e223.tar.xz | |
Merge ktlim@zizzer.eecs.umich.edu:/bk/m5
into zamp.eecs.umich.edu:/z/ktlim2/m5
--HG--
extra : convert_revision : ac0788599c365b2d7fe0870f0fea4b62c3b3ef22
Diffstat (limited to 'python/m5/objects')
| -rw-r--r-- | python/m5/objects/Ethernet.mpy | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/python/m5/objects/Ethernet.mpy b/python/m5/objects/Ethernet.mpy index ed95ce233..141d138da 100644 --- a/python/m5/objects/Ethernet.mpy +++ b/python/m5/objects/Ethernet.mpy @@ -41,6 +41,7 @@ simobj EtherDev(DmaDevice): dma_read_factor = Param.Latency('0us', "multiplier for dma reads") dma_write_delay = Param.Latency('0us', "fixed delay for dma writes") dma_write_factor = Param.Latency('0us', "multiplier for dma writes") + dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") rx_filter = Param.Bool(True, "Enable Receive Filter") rx_delay = Param.Latency('1us', "Receive Delay") @@ -64,6 +65,8 @@ simobj NSGigE(PciDevice): dma_read_factor = Param.Latency('0us', "multiplier for dma reads") dma_write_delay = Param.Latency('0us', "fixed delay for dma writes") dma_write_factor = Param.Latency('0us', "multiplier for dma writes") + dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") + rx_filter = Param.Bool(True, "Enable Receive Filter") rx_delay = Param.Latency('1us', "Receive Delay") @@ -72,6 +75,8 @@ simobj NSGigE(PciDevice): rx_fifo_size = Param.MemorySize('128kB', "max size in bytes of rxFifo") tx_fifo_size = Param.MemorySize('128kB', "max size in bytes of txFifo") + m5reg = Param.UInt32(0, "Register for m5 usage") + intr_delay = Param.Latency('0us', "Interrupt Delay in microseconds") payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload") physmem = Param.PhysicalMemory(parent.any, "Physical Memory") |