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authorAli Saidi <saidi@eecs.umich.edu>2005-06-05 01:22:21 -0400
committerAli Saidi <saidi@eecs.umich.edu>2005-06-05 01:22:21 -0400
commitadce616cfef6f9476d0fbb1bf03fb65734bf3bdf (patch)
tree7fb8eb03752d93931f44180dde2f7e89ddd26bb8 /python/m5/objects
parent8bbaaa7478bdddcd098c4da97f4ac1ba5a97ee67 (diff)
downloadgem5-adce616cfef6f9476d0fbb1bf03fb65734bf3bdf.tar.xz
split uart into urt8250 and uart8530
fix some doxygen comments SConscript: Added split uart files dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: dev/tsunami.cc: dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_pchip.cc: dev/tsunamireg.h: fix doxgyen file comment dev/uart.cc: dev/uart.hh: python/m5/objects/Uart.py: split uart into urt8250 and uart8530 --HG-- extra : convert_revision : 2e70aad892a37620d7909017648bca6d7d69d678
Diffstat (limited to 'python/m5/objects')
-rw-r--r--python/m5/objects/Uart.py8
1 files changed, 8 insertions, 0 deletions
diff --git a/python/m5/objects/Uart.py b/python/m5/objects/Uart.py
index cfb09acad..57b8b44af 100644
--- a/python/m5/objects/Uart.py
+++ b/python/m5/objects/Uart.py
@@ -3,5 +3,13 @@ from Device import PioDevice
class Uart(PioDevice):
type = 'Uart'
+ abstract = True
console = Param.SimConsole(Parent.any, "The console")
size = Param.Addr(0x8, "Device size")
+
+class Uart8250(Uart):
+ type = 'Uart8250'
+
+class Uart8530(Uart):
+ type = 'Uart8530'
+