summaryrefslogtreecommitdiff
path: root/python/m5/objects
diff options
context:
space:
mode:
authorNathan Binkert <binkertn@umich.edu>2005-06-29 01:20:41 -0400
committerNathan Binkert <binkertn@umich.edu>2005-06-29 01:20:41 -0400
commit8a0bc840221cf7af4845f4ee44de11bc7271ff10 (patch)
tree96800ff9b98a6bc32bdb5a443974bb8c2994ebc4 /python/m5/objects
parent036a8ceb8da8aff10b819b4aab32584d41282a64 (diff)
downloadgem5-8a0bc840221cf7af4845f4ee44de11bc7271ff10.tar.xz
Allow CPUs to specify their own CPU ids.
Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788
Diffstat (limited to 'python/m5/objects')
-rw-r--r--python/m5/objects/AlphaConsole.py1
-rw-r--r--python/m5/objects/BaseCPU.py1
2 files changed, 1 insertions, 1 deletions
diff --git a/python/m5/objects/AlphaConsole.py b/python/m5/objects/AlphaConsole.py
index 32a137bec..f8f034682 100644
--- a/python/m5/objects/AlphaConsole.py
+++ b/python/m5/objects/AlphaConsole.py
@@ -5,6 +5,5 @@ class AlphaConsole(PioDevice):
type = 'AlphaConsole'
cpu = Param.BaseCPU(Parent.any, "Processor")
disk = Param.SimpleDisk("Simple Disk")
- num_cpus = Param.Int(1, "Number of CPUs")
sim_console = Param.SimConsole(Parent.any, "The Simulator Console")
system = Param.System(Parent.any, "system object")
diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py
index 452b97c84..a90203729 100644
--- a/python/m5/objects/BaseCPU.py
+++ b/python/m5/objects/BaseCPU.py
@@ -10,6 +10,7 @@ class BaseCPU(SimObject):
itb = Param.AlphaITB("Instruction TLB")
mem = Param.FunctionalMemory("memory")
system = Param.System(Parent.any, "system object")
+ cpu_id = Param.Int(-1, "CPU identifier")
else:
workload = VectorParam.Process("processes to run")