Enhancements to python config proxy class.

python/m5/config.py:
    - Enhanced Proxy class now supports subscripting, e.g.,
    parent.cpu[0] or even parent.cpu[0].icache.

    - Proxy also supports multiplication (e.g., parent.cycle * 3),
    though this feature has not been tested.

    - Subscript 0 works even on non-lists, so you can safely say
    cpu[0] and get the first cpu even if there's only one.

    - Changed name of proxy object from 'Super' to 'parent', and
    changed "wild card" notation from plain 'Super' to 'parent.any'.
python/m5/objects/AlphaConsole.mpy:
python/m5/objects/BaseCPU.mpy:
python/m5/objects/BaseSystem.mpy:
python/m5/objects/Device.mpy:
python/m5/objects/Ethernet.mpy:
python/m5/objects/Ide.mpy:
python/m5/objects/IntrControl.mpy:
python/m5/objects/Pci.mpy:
python/m5/objects/PhysicalMemory.mpy:
python/m5/objects/Platform.mpy:
python/m5/objects/SimConsole.mpy:
python/m5/objects/SimpleDisk.mpy:
python/m5/objects/Tsunami.mpy:
python/m5/objects/Uart.mpy:
    Change 'Super.foo' to 'parent.foo' (and 'Super' to 'parent.any').

--HG--
extra : convert_revision : f996d0a3366d5e3e60ae5973691148c3d7cd497d

14 files changed, 24 insertions, 24 deletions

diff --git a/python/m5/objects/AlphaConsole.mpy b/python/m5/objects/AlphaConsole.mpy
index 79918a01e..63aea5b7d 100644
--- a/python/m5/objects/AlphaConsole.mpy
+++ b/python/m5/objects/AlphaConsole.mpy
@@ -2,8 +2,8 @@ from Device import PioDevice
 
 simobj AlphaConsole(PioDevice):
     type = 'AlphaConsole'
-    cpu = Param.BaseCPU(Super, "Processor")
+    cpu = Param.BaseCPU(parent.any, "Processor")
     disk = Param.SimpleDisk("Simple Disk")
     num_cpus = Param.Int(1, "Number of CPUs")
-    sim_console = Param.SimConsole(Super, "The Simulator Console")
-    system = Param.BaseSystem(Super, "system object")
+    sim_console = Param.SimConsole(parent.any, "The Simulator Console")
+    system = Param.BaseSystem(parent.any, "system object")
diff --git a/python/m5/objects/BaseCPU.mpy b/python/m5/objects/BaseCPU.mpy
index 5d8305d88..d84e30e53 100644
--- a/python/m5/objects/BaseCPU.mpy
+++ b/python/m5/objects/BaseCPU.mpy
@@ -8,7 +8,7 @@ simobj BaseCPU(SimObject):
         dtb = Param.AlphaDTB("Data TLB")
         itb = Param.AlphaITB("Instruction TLB")
         mem = Param.FunctionalMemory("memory")
-        system = Param.BaseSystem(Super, "system object")
+        system = Param.BaseSystem(parent.any, "system object")
     else:
         workload = VectorParam.Process("processes to run")
 
diff --git a/python/m5/objects/BaseSystem.mpy b/python/m5/objects/BaseSystem.mpy
index 1cbdf4e99..450b6a58e 100644
--- a/python/m5/objects/BaseSystem.mpy
+++ b/python/m5/objects/BaseSystem.mpy
@@ -1,8 +1,8 @@
 simobj BaseSystem(SimObject):
     type = 'BaseSystem'
     abstract = True
-    memctrl = Param.MemoryController(Super, "memory controller")
-    physmem = Param.PhysicalMemory(Super, "phsyical memory")
+    memctrl = Param.MemoryController(parent.any, "memory controller")
+    physmem = Param.PhysicalMemory(parent.any, "phsyical memory")
     kernel = Param.String("file that contains the kernel code")
     console = Param.String("file that contains the console code")
     pal = Param.String("file that contains palcode")
diff --git a/python/m5/objects/Device.mpy b/python/m5/objects/Device.mpy
index 47f8db1cb..a0d02a647 100644
--- a/python/m5/objects/Device.mpy
+++ b/python/m5/objects/Device.mpy
@@ -14,7 +14,7 @@ simobj FooPioDevice(FunctionalMemory):
     type = 'PioDevice'
     abstract = True
     addr = Param.Addr("Device Address")
-    mmu = Param.MemoryController(Super, "Memory Controller")
+    mmu = Param.MemoryController(parent.any, "Memory Controller")
     io_bus = Param.Bus(NULL, "The IO Bus to attach to")
     pio_latency = Param.Tick(1, "Programmed IO latency in bus cycles")
 
@@ -25,7 +25,7 @@ simobj FooDmaDevice(FooPioDevice):
 simobj PioDevice(FooPioDevice):
     type = 'PioDevice'
     abstract = True
-    platform = Param.Platform(Super, "Platform")
+    platform = Param.Platform(parent.any, "Platform")
 
 simobj DmaDevice(PioDevice):
     type = 'DmaDevice'
diff --git a/python/m5/objects/Ethernet.mpy b/python/m5/objects/Ethernet.mpy
index 088df4b93..cd251f36d 100644
--- a/python/m5/objects/Ethernet.mpy
+++ b/python/m5/objects/Ethernet.mpy
@@ -49,8 +49,8 @@ simobj EtherDev(DmaDevice):
 
     intr_delay = Param.Tick(0, "Interrupt Delay in microseconds")
     payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
-    physmem = Param.PhysicalMemory(Super, "Physical Memory")
-    tlaser = Param.Turbolaser(Super, "Turbolaser")
+    physmem = Param.PhysicalMemory(parent.any, "Physical Memory")
+    tlaser = Param.Turbolaser(parent.any, "Turbolaser")
 
 simobj NSGigE(PciDevice):
     type = 'NSGigE'
@@ -73,7 +73,7 @@ simobj NSGigE(PciDevice):
 
     intr_delay = Param.Tick(0, "Interrupt Delay in microseconds")
     payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
-    physmem = Param.PhysicalMemory(Super, "Physical Memory")
+    physmem = Param.PhysicalMemory(parent.any, "Physical Memory")
 
 simobj EtherDevInt(EtherInt):
     type = 'EtherDevInt'
diff --git a/python/m5/objects/Ide.mpy b/python/m5/objects/Ide.mpy
index ce760ad96..786109efa 100644
--- a/python/m5/objects/Ide.mpy
+++ b/python/m5/objects/Ide.mpy
@@ -7,7 +7,7 @@ simobj IdeDisk(SimObject):
     delay = Param.Tick(1, "Fixed disk delay in microseconds")
     driveID = Param.IdeID('master', "Drive ID")
     image = Param.DiskImage("Disk image")
-    physmem = Param.PhysicalMemory(Super, "Physical memory")
+    physmem = Param.PhysicalMemory(parent.any, "Physical memory")
 
 simobj IdeController(PciDevice):
     type = 'IdeController'
diff --git a/python/m5/objects/IntrControl.mpy b/python/m5/objects/IntrControl.mpy
index 1ef5a17ee..144be0fd4 100644
--- a/python/m5/objects/IntrControl.mpy
+++ b/python/m5/objects/IntrControl.mpy
@@ -1,3 +1,3 @@
 simobj IntrControl(SimObject):
     type = 'IntrControl'
-    cpu = Param.BaseCPU(Super, "the cpu")
+    cpu = Param.BaseCPU(parent.any, "the cpu")
diff --git a/python/m5/objects/Pci.mpy b/python/m5/objects/Pci.mpy
index f7c6674f7..b9b3e5a95 100644
--- a/python/m5/objects/Pci.mpy
+++ b/python/m5/objects/Pci.mpy
@@ -47,5 +47,5 @@ simobj PciDevice(DmaDevice):
     pci_bus = Param.Int("PCI bus")
     pci_dev = Param.Int("PCI device number")
     pci_func = Param.Int("PCI function code")
-    configdata = Param.PciConfigData(Super, "PCI Config data")
-    configspace = Param.PciConfigAll(Super, "PCI Configspace")
+    configdata = Param.PciConfigData(parent.any, "PCI Config data")
+    configspace = Param.PciConfigAll(parent.any, "PCI Configspace")
diff --git a/python/m5/objects/PhysicalMemory.mpy b/python/m5/objects/PhysicalMemory.mpy
index d1e4ad4b4..e6df2a161 100644
--- a/python/m5/objects/PhysicalMemory.mpy
+++ b/python/m5/objects/PhysicalMemory.mpy
@@ -4,4 +4,4 @@ simobj PhysicalMemory(FunctionalMemory):
     type = 'PhysicalMemory'
     range = Param.AddrRange("Device Address")
     file = Param.String('', "memory mapped file")
-    mmu = Param.MemoryController(Super, "Memory Controller")
+    mmu = Param.MemoryController(parent.any, "Memory Controller")
diff --git a/python/m5/objects/Platform.mpy b/python/m5/objects/Platform.mpy
index d0510eaf8..a71ab3b77 100644
--- a/python/m5/objects/Platform.mpy
+++ b/python/m5/objects/Platform.mpy
@@ -2,4 +2,4 @@ simobj Platform(SimObject):
     type = 'Platform'
     abstract = True
     interrupt_frequency = Param.Tick(1200, "frequency of interrupts")
-    intrctrl = Param.IntrControl(Super, "interrupt controller")
+    intrctrl = Param.IntrControl(parent.any, "interrupt controller")
diff --git a/python/m5/objects/SimConsole.mpy b/python/m5/objects/SimConsole.mpy
index fb74f1775..3588a949d 100644
--- a/python/m5/objects/SimConsole.mpy
+++ b/python/m5/objects/SimConsole.mpy
@@ -5,7 +5,7 @@ simobj ConsoleListener(SimObject):
 simobj SimConsole(SimObject):
     type = 'SimConsole'
     append_name = Param.Bool(True, "append name() to filename")
-    intr_control = Param.IntrControl(Super, "interrupt controller")
+    intr_control = Param.IntrControl(parent.any, "interrupt controller")
     listener = Param.ConsoleListener("console listener")
     number = Param.Int(0, "console number")
     output = Param.String('console', "file to dump output to")
diff --git a/python/m5/objects/SimpleDisk.mpy b/python/m5/objects/SimpleDisk.mpy
index c4dd5435b..b616fb3d1 100644
--- a/python/m5/objects/SimpleDisk.mpy
+++ b/python/m5/objects/SimpleDisk.mpy
@@ -1,4 +1,4 @@
 simobj SimpleDisk(SimObject):
     type = 'SimpleDisk'
     disk = Param.DiskImage("Disk Image")
-    physmem = Param.PhysicalMemory(Super, "Physical Memory")
+    physmem = Param.PhysicalMemory(parent.any, "Physical Memory")
diff --git a/python/m5/objects/Tsunami.mpy b/python/m5/objects/Tsunami.mpy
index cfe23977e..a8471cee2 100644
--- a/python/m5/objects/Tsunami.mpy
+++ b/python/m5/objects/Tsunami.mpy
@@ -4,12 +4,12 @@ from Platform import Platform
 simobj Tsunami(Platform):
     type = 'Tsunami'
     pciconfig = Param.PciConfigAll("PCI configuration")
-    system = Param.BaseSystem(Super, "system")
+    system = Param.BaseSystem(parent.any, "system")
     interrupt_frequency = Param.Int(1024, "frequency of interrupts")
 
 simobj TsunamiCChip(FooPioDevice):
     type = 'TsunamiCChip'
-    tsunami = Param.Tsunami(Super, "Tsunami")
+    tsunami = Param.Tsunami(parent.any, "Tsunami")
 
 simobj TsunamiFake(FooPioDevice):
     type = 'TsunamiFake'
@@ -18,8 +18,8 @@ simobj TsunamiIO(FooPioDevice):
     type = 'TsunamiIO'
     time = Param.UInt64(1136073600,
         "System time to use (0 for actual time, default is 1/1/06)")
-    tsunami = Param.Tsunami(Super, "Tsunami")
+    tsunami = Param.Tsunami(parent.any, "Tsunami")
 
 simobj TsunamiPChip(FooPioDevice):
     type = 'TsunamiPChip'
-    tsunami = Param.Tsunami(Super, "Tsunami")
+    tsunami = Param.Tsunami(parent.any, "Tsunami")
diff --git a/python/m5/objects/Uart.mpy b/python/m5/objects/Uart.mpy
index 76ee8805f..5a6c25f8e 100644
--- a/python/m5/objects/Uart.mpy
+++ b/python/m5/objects/Uart.mpy
@@ -2,5 +2,5 @@ from Device import PioDevice
 
 simobj Uart(PioDevice):
     type = 'Uart'
-    console = Param.SimConsole(Super, "The console")
+    console = Param.SimConsole(parent.any, "The console")
     size = Param.Addr(0x8, "Device size")