diff options
| author | Nathan Binkert <binkertn@umich.edu> | 2005-06-27 17:02:40 -0400 |
|---|---|---|
| committer | Nathan Binkert <binkertn@umich.edu> | 2005-06-27 17:02:40 -0400 |
| commit | c4029ecb306e95a188edf0b8d20a87f1e03e32fe (patch) | |
| tree | 54a12e359cf8dc30dc2c8361a58d2cff7923ea75 /python/m5 | |
| parent | 5ea3c1c8f3902a0c291637e068c13a983229261f (diff) | |
| download | gem5-c4029ecb306e95a188edf0b8d20a87f1e03e32fe.tar.xz | |
Implement a state machine clock that acutally limits how fast
the nsgige state machine can run. The frequency is of the actual
state transitions, and not the rate of what underlying
instructions might run at.
dev/ns_gige.cc:
Implement a state machine clock that acutally limits how fast
the state machine can run. After each state transition, a
variable is kept to hold the next state transition until the
next clock. The frequency is of the actual state transitions,
and not the rate of what underlying instructions might run at.
dev/ns_gige.hh:
Add back the rxKickEvent and txKickEvent events.
python/m5/objects/Ethernet.py:
Default the state machine clock to '0ns' so the default
behaviour doesn't change when we actually implement the
state machine clock.
--HG--
extra : convert_revision : 2db1943dee4e91ea75aaee6a91e88f27f01a09dd
Diffstat (limited to 'python/m5')
| -rw-r--r-- | python/m5/objects/Ethernet.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/python/m5/objects/Ethernet.py b/python/m5/objects/Ethernet.py index 2fbfb1138..a357ba346 100644 --- a/python/m5/objects/Ethernet.py +++ b/python/m5/objects/Ethernet.py @@ -64,7 +64,7 @@ class NSGigE(PciDevice): hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") - clock = Param.Clock('100MHz', "State machine processor frequency") + clock = Param.Clock('0ns', "State machine processor frequency") dma_data_free = Param.Bool(False, "DMA of Data is free") dma_desc_free = Param.Bool(False, "DMA of Descriptors is free") |