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authorNathan Binkert <binkertn@umich.edu>2005-06-04 14:19:05 -0400
committerNathan Binkert <binkertn@umich.edu>2005-06-04 14:19:05 -0400
commitb46730c7ec2e3bd9f110002197c89269d83252f7 (patch)
treeb0a8a7fccfb999be9c5c7f52b51c7a747658d80b /python
parent6b6445eeb92e9ef40e08348691c47aa3153c088d (diff)
downloadgem5-b46730c7ec2e3bd9f110002197c89269d83252f7.tar.xz
BaseSystem -> System
Make System an object that can be instantiated. For operating systems that don't need any OS specific hacks. python/m5/objects/AlphaConsole.py: python/m5/objects/BaseCPU.py: python/m5/objects/Tsunami.py: BaseSystem -> System --HG-- rename : python/m5/objects/BaseSystem.py => python/m5/objects/System.py extra : convert_revision : e5d12db02abef1b0eda720b50dd2c09cb1ac5232
Diffstat (limited to 'python')
-rw-r--r--python/m5/objects/AlphaConsole.py2
-rw-r--r--python/m5/objects/BaseCPU.py2
-rw-r--r--python/m5/objects/System.py (renamed from python/m5/objects/BaseSystem.py)3
-rw-r--r--python/m5/objects/Tsunami.py2
4 files changed, 4 insertions, 5 deletions
diff --git a/python/m5/objects/AlphaConsole.py b/python/m5/objects/AlphaConsole.py
index 9fe31b009..32a137bec 100644
--- a/python/m5/objects/AlphaConsole.py
+++ b/python/m5/objects/AlphaConsole.py
@@ -7,4 +7,4 @@ class AlphaConsole(PioDevice):
disk = Param.SimpleDisk("Simple Disk")
num_cpus = Param.Int(1, "Number of CPUs")
sim_console = Param.SimConsole(Parent.any, "The Simulator Console")
- system = Param.BaseSystem(Parent.any, "system object")
+ system = Param.System(Parent.any, "system object")
diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py
index 0dc436434..452b97c84 100644
--- a/python/m5/objects/BaseCPU.py
+++ b/python/m5/objects/BaseCPU.py
@@ -9,7 +9,7 @@ class BaseCPU(SimObject):
dtb = Param.AlphaDTB("Data TLB")
itb = Param.AlphaITB("Instruction TLB")
mem = Param.FunctionalMemory("memory")
- system = Param.BaseSystem(Parent.any, "system object")
+ system = Param.System(Parent.any, "system object")
else:
workload = VectorParam.Process("processes to run")
diff --git a/python/m5/objects/BaseSystem.py b/python/m5/objects/System.py
index 457eadb36..c247983c5 100644
--- a/python/m5/objects/BaseSystem.py
+++ b/python/m5/objects/System.py
@@ -1,7 +1,6 @@
from m5 import *
-class BaseSystem(SimObject):
+class System(SimObject):
type = 'BaseSystem'
- abstract = True
boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency,
"boot processor frequency")
memctrl = Param.MemoryController(Parent.any, "memory controller")
diff --git a/python/m5/objects/Tsunami.py b/python/m5/objects/Tsunami.py
index fa3c18127..c8fd94e2c 100644
--- a/python/m5/objects/Tsunami.py
+++ b/python/m5/objects/Tsunami.py
@@ -5,7 +5,7 @@ from Platform import Platform
class Tsunami(Platform):
type = 'Tsunami'
pciconfig = Param.PciConfigAll("PCI configuration")
- system = Param.BaseSystem(Parent.any, "system")
+ system = Param.System(Parent.any, "system")
class TsunamiCChip(FooPioDevice):
type = 'TsunamiCChip'