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| author | Benjamin Nash <benash@umich.edu> | 2005-06-29 11:17:12 -0400 |
|---|---|---|
| committer | Benjamin Nash <benash@umich.edu> | 2005-06-29 11:17:12 -0400 |
| commit | eaeb1b6ff084b4797a31908fa5fb1d688c55dd60 (patch) | |
| tree | 7a8e4d4bcd25f2f51c1020fedeff0f47449fd0c9 /python | |
| parent | bc76a807af2a2a874be461f0c6be9a6c5ec8bfad (diff) | |
| parent | 8a0bc840221cf7af4845f4ee44de11bc7271ff10 (diff) | |
| download | gem5-eaeb1b6ff084b4797a31908fa5fb1d688c55dd60.tar.xz | |
Merge m5read@m5.eecs.umich.edu:/bk/m5
into zed.eecs.umich.edu:/z/benash/bk/m5
--HG--
extra : convert_revision : a27bb3737d8a7d5c1fadf27f4cb5018d0b6054da
Diffstat (limited to 'python')
| -rw-r--r-- | python/m5/objects/AlphaConsole.py | 1 | ||||
| -rw-r--r-- | python/m5/objects/BaseCPU.py | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/python/m5/objects/AlphaConsole.py b/python/m5/objects/AlphaConsole.py index 32a137bec..f8f034682 100644 --- a/python/m5/objects/AlphaConsole.py +++ b/python/m5/objects/AlphaConsole.py @@ -5,6 +5,5 @@ class AlphaConsole(PioDevice): type = 'AlphaConsole' cpu = Param.BaseCPU(Parent.any, "Processor") disk = Param.SimpleDisk("Simple Disk") - num_cpus = Param.Int(1, "Number of CPUs") sim_console = Param.SimConsole(Parent.any, "The Simulator Console") system = Param.System(Parent.any, "system object") diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py index 452b97c84..a90203729 100644 --- a/python/m5/objects/BaseCPU.py +++ b/python/m5/objects/BaseCPU.py @@ -10,6 +10,7 @@ class BaseCPU(SimObject): itb = Param.AlphaITB("Instruction TLB") mem = Param.FunctionalMemory("memory") system = Param.System(Parent.any, "system object") + cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") |