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authorRon Dreslinski <rdreslin@umich.edu>2005-04-08 18:26:00 -0400
committerRon Dreslinski <rdreslin@umich.edu>2005-04-08 18:26:00 -0400
commit0d2e816a4c4bf949ba7517c793320be8aed03dab (patch)
tree7e6662e09d98c0605f85c13898562e731ecd0bc6 /python
parent9f2568f966a0ce36bfd7b3114aac1fcf419566c4 (diff)
parent2d2f663d3aa993b5914cb27fab7c859fd4829001 (diff)
downloadgem5-0d2e816a4c4bf949ba7517c793320be8aed03dab.tar.xz
Hand merged a this-> statement for gcc3.4
--HG-- extra : convert_revision : 11daa94a0631da5e9c2e4262a448035491dd86e5
Diffstat (limited to 'python')
-rw-r--r--python/m5/objects/BaseCache.mpy2
1 files changed, 2 insertions, 0 deletions
diff --git a/python/m5/objects/BaseCache.mpy b/python/m5/objects/BaseCache.mpy
index 214e0555c..a9bda5c99 100644
--- a/python/m5/objects/BaseCache.mpy
+++ b/python/m5/objects/BaseCache.mpy
@@ -58,3 +58,5 @@ simobj BaseCache(BaseMem):
"Check if in cash on push or pop of prefetch queue")
prefetch_use_cpu_id = Param.Bool(True,
"Use the CPU ID to seperate calculations of prefetches")
+ prefetch_data_accesses_only = Param.Bool(False,
+ "Only prefetch on data not on instruction accesses")