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authorAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-03-30 15:59:49 -0500
commite196d20d9d047a869e1d853fd02077b1d909a576 (patch)
tree3b45bd223ff1d144af5f94fc9431f01b8a0bad61 /sim/process.cc
parent0b2deb2a8897fa857d2b3e1936401c6666fdc728 (diff)
downloadgem5-e196d20d9d047a869e1d853fd02077b1d909a576.tar.xz
Make TranslatingPort be a type of Port rather than something special
arch/alpha/arguments.cc: rather than returning 0, put a panic in... it will actually make us fix this rather than scratching our respective heads base/loader/object_file.cc: base/loader/object_file.hh: Object loader now takes a port rather than a translating port cpu/cpu_exec_context.cc: cpu/cpu_exec_context.hh: sim/process.cc: Make translating port a type of port rather than anything special cpu/simple/cpu.cc: no need to grab a port from the cpu anymore mem/physical.cc: add an additional type of port to physicalmemory called "functional" Only used for functional accesses (loading binaries/syscall emu) mem/port.hh: make readBlok/writeBlob virtual so translating port can do the translation first mem/translating_port.cc: mem/translating_port.hh: Make TranslatingPort inherit from Port sim/system.cc: header file that doesn't exit removed --HG-- extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
Diffstat (limited to 'sim/process.cc')
-rw-r--r--sim/process.cc20
1 files changed, 5 insertions, 15 deletions
diff --git a/sim/process.cc b/sim/process.cc
index 7b27c4274..b483c70dc 100644
--- a/sim/process.cc
+++ b/sim/process.cc
@@ -153,21 +153,11 @@ Process::startup()
// mark this context as active so it will start ticking.
xc->activate(0);
- // Here we are grabbing the memory port of the CPU hosting the
- // initial execution context for initialization. In the long run
- // this is not what we want, since it means that all
- // initialization accesses (e.g., loading object file sections)
- // will be done a cache block at a time through the CPU's cache.
- // We really want something more like:
- //
- // memport = system->physmem->getPort();
- // myPort.setPeer(memport);
- // memport->setPeer(&myPort);
- // initVirtMem = new TranslatingPort(myPort, pTable);
- //
- // but we need our own dummy port "myPort" that doesn't exist.
- // In the short term it works just fine though.
- initVirtMem = xc->getMemPort();
+ Port *mem_port;
+ mem_port = system->physmem->getPort("functional");
+ initVirtMem = new TranslatingPort(pTable, true);
+ mem_port->setPeer(initVirtMem);
+ initVirtMem->setPeer(mem_port);
}
void