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authorRon Dreslinski <rdreslin@umich.edu>2006-02-15 14:53:02 -0500
committerRon Dreslinski <rdreslin@umich.edu>2006-02-15 14:53:02 -0500
commit90def9ea9ee17c63af846685d55d8956b37476ab (patch)
treefe2404a6751dd924f4fe531dda01f9201a16d706 /sim/process.hh
parent7f114ca41930c7e0a71dfb105472671cfa25ddec (diff)
downloadgem5-90def9ea9ee17c63af846685d55d8956b37476ab.tar.xz
Changes to start making the tree use the new memory system. Trying to compile decoder.cc but fails still.
SConscript: Place the memory objects back in the right place arch/alpha/isa_desc: Fix includes to point to the new memory requests cpu/exec_context.hh: Exec context now points to memory object, fix the include paths. Convert to prot_read/prot_write functions instead of read and write. Convert to new CpuRequestPtr instead of MemReqPtr. mem/request.hh: Add back in support for Request Flags (needed by decoder to tag request) Removed the flags that were associated with packets/coherence. sim/process.hh: Converted to point to new memory objects --HG-- extra : convert_revision : a0b95380915d63b53194e2a26336d6adb1a0086b
Diffstat (limited to 'sim/process.hh')
-rw-r--r--sim/process.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/sim/process.hh b/sim/process.hh
index e7e0b8a9b..cdd28982d 100644
--- a/sim/process.hh
+++ b/sim/process.hh
@@ -42,15 +42,15 @@
#include "base/statistics.hh"
#include "base/trace.hh"
-#include "mem/base_mem.hh"
-#include "mem/mem_interface.hh"
+#include "mem/memory.hh"
+//#include "mem/mem_interface.hh"
#include "mem/page_table.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
#include "targetarch/isa_traits.hh"
class ExecContext;
-class FunctionalMemory;
+class Memory;
class System;
class Process : public SimObject
@@ -128,7 +128,7 @@ class Process : public SimObject
protected:
/// Memory object for initialization (image loading)
- FunctionalMemory *initVirtMem;
+ Memory *initVirtMem;
public:
PageTable *pTable;