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authorNathan Binkert <binkertn@umich.edu>2005-11-25 13:33:36 -0500
committerNathan Binkert <binkertn@umich.edu>2005-11-25 13:33:36 -0500
commit47ff0af17e4494ed99c6eebbf8c6b742f7f7dacf (patch)
tree227376761e1ebee0aba84920e45bb36ab2bec6c6 /sim/system.cc
parent60e92986f739a025a6534972b8e1cf9498ce3fd2 (diff)
downloadgem5-47ff0af17e4494ed99c6eebbf8c6b742f7f7dacf.tar.xz
Virtualize sinic
separate the rx thread and tx thread and get rid of the dedicated flag. dev/ns_gige.cc: dev/ns_gige.hh: dev/ns_gige_reg.h: python/m5/objects/Ethernet.py: dedicated flag goes away, we have new individual flags for rx thread and tx thread dev/sinic.cc: Virtualize sinic - The io registers are replicated many times in memory, allowing the NIC to differentiate among several virtual interfaces. - On the TX side, this allows multiple CPUs to initiate transmits at the same time without locking in the software. If a partial packet is transmitted, then the state machine blocks waiting for that virtual interface to complete its packet. Then the state machine will move on to the next virtual interface. The commands are kept in fifo order. - On the RX side, multiple partial transmits can be simultaneously done. Though a packet does not deallocate its fifo space until all preceeding packets in the fifo are deallocated. To enable multiple receives, it is necessary for each virtual nic to keep its own information about its progress through the state machine. dev/sinic.hh: Virtualize sinic Receive state must be virtualized since we allow the receipt of packets in parallel. dev/sinicreg.hh: Virtualize sinic separate rx thread and tx thread create a soft interrupt and add a command to trigger it. pad out the reserved bits in the RxDone and TxDone regs --HG-- extra : convert_revision : c10bb23a46a89ffd1e08866c1f1621cb98069205
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