Make TranslatingPort be a type of Port rather than something special

arch/alpha/arguments.cc:
    rather than returning 0, put a panic in... it will actually make us fix
    this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
    Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
    Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
    no need to grab a port from the cpu anymore
mem/physical.cc:
    add an additional type of port to physicalmemory called "functional"
    Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
    make readBlok/writeBlob virtual so translating port can do the
    translation first
mem/translating_port.cc:
mem/translating_port.hh:
    Make TranslatingPort inherit from Port
sim/system.cc:
    header file that doesn't exit removed

--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7

2 files changed, 5 insertions, 16 deletions

diff --git a/sim/process.cc b/sim/process.cc
index 7b27c4274..b483c70dc 100644
--- a/sim/process.cc
+++ b/sim/process.cc
@@ -153,21 +153,11 @@ Process::startup()
     // mark this context as active so it will start ticking.
     xc->activate(0);
 
-    // Here we are grabbing the memory port of the CPU hosting the
-    // initial execution context for initialization.  In the long run
-    // this is not what we want, since it means that all
-    // initialization accesses (e.g., loading object file sections)
-    // will be done a cache block at a time through the CPU's cache.
-    // We really want something more like:
-    //
-    // memport = system->physmem->getPort();
-    // myPort.setPeer(memport);
-    // memport->setPeer(&myPort);
-    // initVirtMem = new TranslatingPort(myPort, pTable);
-    //
-    // but we need our own dummy port "myPort" that doesn't exist.
-    // In the short term it works just fine though.
-    initVirtMem = xc->getMemPort();
+    Port *mem_port;
+    mem_port = system->physmem->getPort("functional");
+    initVirtMem = new TranslatingPort(pTable, true);
+    mem_port->setPeer(initVirtMem);
+    initVirtMem->setPeer(mem_port);
 }
 
 void
diff --git a/sim/system.cc b/sim/system.cc
index 409e41ead..c1eaaf916 100644
--- a/sim/system.cc
+++ b/sim/system.cc
@@ -10,7 +10,6 @@
 #if FULL_SYSTEM
 #include "base/remote_gdb.hh"
 #include "kern/kernel_stats.hh"
-#include "mem/functional/memory_control.hh"
 #include "arch/vtophys.hh"
 #endif