Make loaders use translation port instead of proxy memory.

Also start compiling Simple CPU again.

SConscript:
    Start Compiling Simple CPU as well
base/loader/aout_object.cc:
base/loader/aout_object.hh:
base/loader/ecoff_object.cc:
base/loader/ecoff_object.hh:
base/loader/elf_object.cc:
base/loader/elf_object.hh:
base/loader/object_file.hh:
sim/process.cc:
sim/process.hh:
    Convert loaders to used translation port instead of proxy memory

--HG--
extra : convert_revision : 63275071f6a0e0d71935641205b203d94381ee44

2 files changed, 10 insertions, 10 deletions

diff --git a/sim/process.cc b/sim/process.cc
index 2355fdc19..013ac0890 100644
--- a/sim/process.cc
+++ b/sim/process.cc
@@ -43,7 +43,7 @@
 #include "encumbered/eio/eio.hh"
 #include "mem/page_table.hh"
 #include "mem/memory.hh"
-#include "mem/proxy.hh"
+#include "mem/translating_port.hh"
 #include "sim/builder.hh"
 #include "sim/fake_syscall.hh"
 #include "sim/process.hh"
@@ -154,7 +154,7 @@ Process::startup()
     if (execContexts.empty())
         fatal("Process %s is not associated with any CPUs!\n", name());
 
-    initVirtMem = new ProxyMemory(system->physmem, pTable);
+    initVirtMem = new TranslatingPort(system->physmem->getPort("any"), pTable);
 
     // first exec context for this process... initialize & enable
     ExecContext *xc = execContexts[0];
@@ -245,18 +245,18 @@ DEFINE_SIM_OBJECT_CLASS_NAME("Process", Process)
 
 static void
 copyStringArray(vector<string> &strings, Addr array_ptr, Addr data_ptr,
-                Memory *func)
+                TranslatingPort* memPort)
 {
     for (int i = 0; i < strings.size(); ++i) {
-        func->prot_write(array_ptr, (uint8_t*)&data_ptr, sizeof(Addr));
-        func->writeStringFunctional(data_ptr, strings[i].c_str());
+        memPort->writeBlobFunctional(array_ptr, (uint8_t*)&data_ptr, sizeof(Addr));
+        memPort->writeStringFunctional(data_ptr, strings[i].c_str());
         array_ptr += sizeof(Addr);
         data_ptr += strings[i].size() + 1;
     }
     // add NULL terminator
     data_ptr = 0;
 
-    func->prot_write(array_ptr, (uint8_t*)&data_ptr, sizeof(Addr));
+    memPort->writeBlobFunctional(array_ptr, (uint8_t*)&data_ptr, sizeof(Addr));
 }
 
 LiveProcess::LiveProcess(const string &nm, ObjectFile *_objFile,
@@ -273,7 +273,7 @@ LiveProcess::LiveProcess(const string &nm, ObjectFile *_objFile,
     text_size = objFile->textSize();
     data_base = objFile->dataBase();
     data_size = objFile->dataSize() + objFile->bssSize();
-    brk_point = = roundUp(data_base + data_size, VMPageSize);
+    brk_point = roundUp(data_base + data_size, VMPageSize);
 
     // Set up stack.  On Alpha, stack goes below text section.  This
     // code should get moved to some architecture-specific spot.
@@ -341,7 +341,7 @@ LiveProcess::startup()
 
     // write contents to stack
     uint64_t argc = argv.size();
-    initVirtMem->prot_write(stack_min, (uint8_t*)&argc, sizeof(uint64_t));
+    initVirtMem->writeBlobFunctional(stack_min, (uint8_t*)&argc, sizeof(uint64_t));
 
     copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
     copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
diff --git a/sim/process.hh b/sim/process.hh
index cdd28982d..8d8c9e676 100644
--- a/sim/process.hh
+++ b/sim/process.hh
@@ -50,7 +50,7 @@
 #include "targetarch/isa_traits.hh"
 
 class ExecContext;
-class Memory;
+class TranslatingPort;
 class System;
 
 class Process : public SimObject
@@ -128,7 +128,7 @@ class Process : public SimObject
 
   protected:
     /// Memory object for initialization (image loading)
-    Memory *initVirtMem;
+    TranslatingPort *initVirtMem;
 
   public:
     PageTable *pTable;