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authorTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:38 -0400
committerTony Gutierrez <anthony.gutierrez@amd.com>2016-10-26 22:47:38 -0400
commitd327cdba078e0956596513b518731e9ec730723f (patch)
tree0ad01f9fa3061d6846c019bd075103f55ad74689 /src/arch/SConscript
parent98d8a7051d8caa9b5aebebe5bf16f9d731c34c0e (diff)
downloadgem5-d327cdba078e0956596513b518731e9ec730723f.tar.xz
gpu-compute: add gpu_isa.hh to switch hdrs, add GPUISA to WF
the GPUISA class is meant to encapsulate any ISA-specific behavior - special register accesses, isa-specific WF/kernel state, etc. - in a generic enough way so that it may be used in ISA-agnostic code. gpu-compute: use the GPUISA object to advance the PC the GPU model treats the PC as a pointer to individual instruction objects - which are store in a contiguous array - and not a byte address to be fetched from the real memory system. this is ok for HSAIL because all instructions are considered by the model to be the same size. in machine ISA, however, instructions may be 32b or 64b, and branches are calculated by advancing the PC by the number of words (4 byte chunks) it needs to advance in the real instruction stream. because of this there is a mismatch between the PC we use to index into the instruction array, and the actual byte address PC the ISA expects. here we move the PC advance calculation to the ISA so that differences in the instrucion sizes may be accounted for in generic way.
Diffstat (limited to 'src/arch/SConscript')
-rw-r--r--src/arch/SConscript1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/SConscript b/src/arch/SConscript
index b022cb01f..54d97a4d9 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -71,6 +71,7 @@ make_switching_dir('arch', isa_switch_hdrs, env)
if env['BUILD_GPU']:
gpu_isa_switch_hdrs = Split('''
gpu_decoder.hh
+ gpu_isa.hh
gpu_types.hh
''')