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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-04-06 10:19:36 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-04-06 10:19:36 -0700 |
| commit | d080581db1f9ee4e1e6d07d2b01c13c67908a391 (patch) | |
| tree | cc484b289fa5a30c4631f9faa1d8b456bffeebfc /src/arch/SConscript | |
| parent | 7a7c4c5fca83a8d47c7e71c9c080a882ebe204a9 (diff) | |
| parent | 639cb0a42d953ee32bc7e96b0cdfa96cd40e9fc1 (diff) | |
| download | gem5-d080581db1f9ee4e1e6d07d2b01c13c67908a391.tar.xz | |
Merge ARM into the head. ARM will compile but may not actually work.
Diffstat (limited to 'src/arch/SConscript')
| -rw-r--r-- | src/arch/SConscript | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/SConscript b/src/arch/SConscript index 66f93870e..b85ffbd89 100644 --- a/src/arch/SConscript +++ b/src/arch/SConscript @@ -49,13 +49,13 @@ isa_switch_hdrs = Split(''' isa_traits.hh kernel_stats.hh locked_mem.hh + microcode_rom.hh mmaped_ipr.hh process.hh predecoder.hh regfile.hh remote_gdb.hh stacktrace.hh - syscallreturn.hh tlb.hh types.hh utility.hh @@ -125,3 +125,8 @@ else: emitter = isa_desc_emitter) env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) + +TraceFlag('IntRegs') +TraceFlag('FloatRegs') +TraceFlag('MiscRegs') +CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) |