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authorRon Dreslinski <rdreslin@umich.edu>2007-04-23 14:38:04 -0400
committerRon Dreslinski <rdreslin@umich.edu>2007-04-23 14:38:04 -0400
commit3eb4ba3abb0457fce0415b9fd5afb623028b1482 (patch)
tree356ec82872760b74a3dad82aad18ef27719d9b4d /src/arch/alpha/ev5.cc
parent3b95161da834baa0d1bd635934ed308c2ec03632 (diff)
parent46f6fa8b45a1a1a572085f33c5173b189f76e407 (diff)
downloadgem5-3eb4ba3abb0457fce0415b9fd5afb623028b1482.tar.xz
Merge zizzer:/bk/newmem
into zazzer.eecs.umich.edu:/z/rdreslin/m5bk/head --HG-- extra : convert_revision : 11df5fb2a8f1fa020d042e75b22a7f2f2bcbd9ab
Diffstat (limited to 'src/arch/alpha/ev5.cc')
-rw-r--r--src/arch/alpha/ev5.cc14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index ec5090eb8..86b8fd2d0 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -245,13 +245,13 @@ AlphaISA::MiscRegFile::readIpr(int idx, ThreadContext *tc)
{
AlphaISA::PTE &pte = tc->getDTBPtr()->index(!tc->misspeculating());
- retval |= ((u_int64_t)pte.ppn & ULL(0x7ffffff)) << 32;
- retval |= ((u_int64_t)pte.xre & ULL(0xf)) << 8;
- retval |= ((u_int64_t)pte.xwe & ULL(0xf)) << 12;
- retval |= ((u_int64_t)pte.fonr & ULL(0x1)) << 1;
- retval |= ((u_int64_t)pte.fonw & ULL(0x1))<< 2;
- retval |= ((u_int64_t)pte.asma & ULL(0x1)) << 4;
- retval |= ((u_int64_t)pte.asn & ULL(0x7f)) << 57;
+ retval |= ((uint64_t)pte.ppn & ULL(0x7ffffff)) << 32;
+ retval |= ((uint64_t)pte.xre & ULL(0xf)) << 8;
+ retval |= ((uint64_t)pte.xwe & ULL(0xf)) << 12;
+ retval |= ((uint64_t)pte.fonr & ULL(0x1)) << 1;
+ retval |= ((uint64_t)pte.fonw & ULL(0x1))<< 2;
+ retval |= ((uint64_t)pte.asma & ULL(0x1)) << 4;
+ retval |= ((uint64_t)pte.asn & ULL(0x7f)) << 57;
}
break;