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author | Korey Sewell <ksewell@umich.edu> | 2006-06-14 14:43:45 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-06-14 14:43:45 -0400 |
commit | 2a9becba44f1d70b05100c04b95d475c43099fa9 (patch) | |
tree | 46ef0e871f3329698feeee25d0d6935f21661b78 /src/arch/alpha/ev5.cc | |
parent | e715e298e044af3727423b27d08327d72b2d74fa (diff) | |
parent | 7709e6ba93be4b67b22e2f3f9c853a3e1ab4458b (diff) | |
download | gem5-2a9becba44f1d70b05100c04b95d475c43099fa9.tar.xz |
Merge zizzer:/bk/newmem
into zazzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-release
--HG--
extra : convert_revision : 9b5b1419e8e22bce16ed97fc02c2008ca0181afc
Diffstat (limited to 'src/arch/alpha/ev5.cc')
-rw-r--r-- | src/arch/alpha/ev5.cc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index 7d6894733..ae3b668ea 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -59,8 +59,12 @@ AlphaISA::initCPU(ThreadContext *tc, int cpuId) tc->setIntReg(16, cpuId); tc->setIntReg(0, cpuId); - tc->setPC(tc->readMiscReg(IPR_PAL_BASE) + (new ResetFault)->vect()); + AlphaFault *reset = new ResetFault; + + tc->setPC(tc->readMiscReg(IPR_PAL_BASE) + reset->vect()); tc->setNextPC(tc->readPC() + sizeof(MachInst)); + + delete reset; } //////////////////////////////////////////////////////////////////////// |