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authorGabe Black <gblack@eecs.umich.edu>2012-01-07 02:10:34 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-07 02:10:34 -0800
commit36a822f08e88483b41af214ace4fd3dccf3aa8cb (patch)
treed7c4c08590459d967a1d7638b02c586911826953 /src/arch/alpha/ev5.cc
parent85424bef192c02a47c0d46c2d99ac0a5d6e55a99 (diff)
parentf171a29118e1d80c04c72d2fb5f024fed4fb62af (diff)
downloadgem5-36a822f08e88483b41af214ace4fd3dccf3aa8cb.tar.xz
Merge with main repository.
Diffstat (limited to 'src/arch/alpha/ev5.cc')
-rw-r--r--src/arch/alpha/ev5.cc7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 9863a7370..4dcc58ffe 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -202,8 +202,6 @@ int break_ipl = -1;
void
ISA::setIpr(int idx, uint64_t val, ThreadContext *tc)
{
- uint64_t old;
-
if (tc->misspeculating())
return;
@@ -255,10 +253,9 @@ ISA::setIpr(int idx, uint64_t val, ThreadContext *tc)
case IPR_PALtemp23:
// write entire quad w/ no side-effect
- old = ipr[idx];
- ipr[idx] = val;
if (tc->getKernelStats())
- tc->getKernelStats()->context(old, val, tc);
+ tc->getKernelStats()->context(ipr[idx], val, tc);
+ ipr[idx] = val;
break;
case IPR_DTB_PTE: