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| author | Nathan Binkert <nate@binkert.org> | 2011-04-15 10:44:15 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2011-04-15 10:44:15 -0700 |
| commit | f946d7bcdb4d0b4327857d319dd4ecdd1c320d62 (patch) | |
| tree | ac1507e1c495e3a86ea43ea1249121ab1e591715 /src/arch/alpha/ev5.cc | |
| parent | bbb1392c088f8c41e7e438380f5b5358c41c178a (diff) | |
| download | gem5-f946d7bcdb4d0b4327857d319dd4ecdd1c320d62.tar.xz | |
debug: create a Debug namespace
Diffstat (limited to 'src/arch/alpha/ev5.cc')
| -rw-r--r-- | src/arch/alpha/ev5.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc index f97244260..2bc913f92 100644 --- a/src/arch/alpha/ev5.cc +++ b/src/arch/alpha/ev5.cc @@ -289,7 +289,7 @@ ISA::setIpr(int idx, uint64_t val, ThreadContext *tc) case IPR_IPLR: #ifdef DEBUG if (break_ipl != -1 && break_ipl == (int)(val & 0x1f)) - debug_break(); + Debug::breakpoint(); #endif // only write least significant five bits - interrupt level |