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authorAli Saidi <Ali.Saidi@ARM.com>2010-11-08 13:58:22 -0600
committerAli Saidi <Ali.Saidi@ARM.com>2010-11-08 13:58:22 -0600
commit0ea794bcf453093f83c21a56333d78ba1b8dae33 (patch)
tree969727aba252ca3f2f910a6d380a743409e4594e /src/arch/alpha/freebsd
parent72b526227857c5eeb90b52fad18eb2d647a27403 (diff)
downloadgem5-0ea794bcf453093f83c21a56333d78ba1b8dae33.tar.xz
sim: Use forward declarations for ports.
Virtual ports need TLB data which means anything touching a file in the arch directory rebuilds any file that includes system.hh which in everything.
Diffstat (limited to 'src/arch/alpha/freebsd')
-rw-r--r--src/arch/alpha/freebsd/system.cc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/alpha/freebsd/system.cc b/src/arch/alpha/freebsd/system.cc
index ac7a92ed3..6c7da711f 100644
--- a/src/arch/alpha/freebsd/system.cc
+++ b/src/arch/alpha/freebsd/system.cc
@@ -43,6 +43,7 @@
#include "cpu/thread_context.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
+#include "mem/vport.hh"
#include "sim/byteswap.hh"
#define TIMER_FREQUENCY 1193180
@@ -77,8 +78,8 @@ FreebsdAlphaSystem::doCalibrateClocks(ThreadContext *tc)
ppc_vaddr = (Addr)tc->readIntReg(17);
timer_vaddr = (Addr)tc->readIntReg(18);
- virtPort.write(ppc_vaddr, (uint32_t)SimClock::Frequency);
- virtPort.write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
+ virtPort->write(ppc_vaddr, (uint32_t)SimClock::Frequency);
+ virtPort->write(timer_vaddr, (uint32_t)TIMER_FREQUENCY);
}
void