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authorGabe Black <gblack@eecs.umich.edu>2007-07-17 15:33:18 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-07-17 15:33:18 -0700
commita6757095c35cfdc491396cd97a32c19aacaffe2e (patch)
tree9b2dc5f77f47bee8b1107d1b168ca843e2a32540 /src/arch/alpha/idle_event.cc
parentcf846d5205c021a04ab1a8e830d9cb86be0bda6e (diff)
downloadgem5-a6757095c35cfdc491396cd97a32c19aacaffe2e.tar.xz
Add in support for condition code flags.
Some microops can set the condition codes, and some of them can be predicated on them. Some of the codes aren't implemented because it was unclear from the AMD patent what they actually did. They are used with string instructions, but they use variables IP, DTF, and SSTF which don't appear to be documented. --HG-- extra : convert_revision : 2236cccd07d0091762b50148975f301bb1d2da3f
Diffstat (limited to 'src/arch/alpha/idle_event.cc')
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