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| author | Nathan Binkert <nate@binkert.org> | 2009-06-04 23:21:12 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2009-06-04 23:21:12 -0700 |
| commit | 6faf377b5305f9dcc3c7b013c4d67f5accb92617 (patch) | |
| tree | 0e437fb49a32dd3d2d2bec95a8dc3bdb4ddf05b0 /src/arch/alpha/interrupts.hh | |
| parent | 4e3426624557b555c354035ee3961eab7554d81d (diff) | |
| download | gem5-6faf377b5305f9dcc3c7b013c4d67f5accb92617.tar.xz | |
types: clean up types, especially signed vs unsigned
Diffstat (limited to 'src/arch/alpha/interrupts.hh')
| -rw-r--r-- | src/arch/alpha/interrupts.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh index f8e0ad4ef..3200201db 100644 --- a/src/arch/alpha/interrupts.hh +++ b/src/arch/alpha/interrupts.hh @@ -139,14 +139,14 @@ class Interrupts : public SimObject Fault getInterrupt(ThreadContext *tc) { - int ipl = 0; - int summary = 0; + uint64_t ipl = 0; + uint64_t summary = 0; if (tc->readMiscRegNoEffect(IPR_ASTRR)) panic("asynchronous traps not implemented\n"); if (tc->readMiscRegNoEffect(IPR_SIRR)) { - for (int i = INTLEVEL_SOFTWARE_MIN; + for (uint64_t i = INTLEVEL_SOFTWARE_MIN; i < INTLEVEL_SOFTWARE_MAX; i++) { if (tc->readMiscRegNoEffect(IPR_SIRR) & (ULL(1) << i)) { // See table 4-19 of 21164 hardware reference @@ -158,7 +158,7 @@ class Interrupts : public SimObject uint64_t interrupts = intstatus; if (interrupts) { - for (int i = INTLEVEL_EXTERNAL_MIN; + for (uint64_t i = INTLEVEL_EXTERNAL_MIN; i < INTLEVEL_EXTERNAL_MAX; i++) { if (interrupts & (ULL(1) << i)) { // See table 4-19 of 21164 hardware reference |